초록 ▼

A presence detection system includes a reader device attached to a first body, and a tag device attached to a second body. The reader device has an ultrasonic transducer for generating and transmitting ultrasonic pulses at a first rate of occurrence; an RF receiver for receiving a RF signal; and a m

A presence detection system includes a reader device attached to a first body, and a tag device attached to a second body. The reader device has an ultrasonic transducer for generating and transmitting ultrasonic pulses at a first rate of occurrence; an RF receiver for receiving a RF signal; and a microcontroller coupled to the ultrasonic transducer and the RF receiver for receiving signals from the ultrasonic transducer and the RF receiver and for controlling the operation of ultrasonic transducer and the RF receiver. The tag device has an ultrasonic receiver for receiving ultrasonic pulses from the ultrasonic transducer of the reader device; and an RF pulse generator for generating and transmitting an RF pulse. The microcontroller instructs the ultrasonic transducer to generate and transmit the ultrasonic pulses; the ultrasonic receiver of the tag device receives at least one of the ultrasonic pulses; the ultrasonic receiver triggers the RF signal generator to transmit an RF pulse; the RF receiver of the reader device receives the RF signal; and the microcontroller detects the presence of the tag device based on the reception of the RF pulse. The distance between the reader device and the tag device is determined based on the amount of time between the transmission of the ultrasound pulse by the reader device and the reception of the response RF pulse by the reader device.

대표청구항 ▼

A presence detection system includes a reader device attached to a first body, and a tag device attached to a second body. The reader device has an ultrasonic transducer for generating and transmitting ultrasonic pulses at a first rate of occurrence; an RF receiver for receiving a RF signal; and a m

A presence detection system includes a reader device attached to a first body, and a tag device attached to a second body. The reader device has an ultrasonic transducer for generating and transmitting ultrasonic pulses at a first rate of occurrence; an RF receiver for receiving a RF signal; and a microcontroller coupled to the ultrasonic transducer and the RF receiver for receiving signals from the ultrasonic transducer and the RF receiver and for controlling the operation of ultrasonic transducer and the RF receiver. The tag device has an ultrasonic receiver for receiving ultrasonic pulses from the ultrasonic transducer of the reader device; and an RF pulse generator for generating and transmitting an RF pulse. The microcontroller instructs the ultrasonic transducer to generate and transmit the ultrasonic pulses; the ultrasonic receiver of the tag device receives at least one of the ultrasonic pulses; the ultrasonic receiver triggers the RF signal generator to transmit an RF pulse; the RF receiver of the reader device receives the RF signal; and the microcontroller detects the presence of the tag device based on the reception of the RF pulse. The distance between the reader device and the tag device is determined based on the amount of time between the transmission of the ultrasound pulse by the reader device and the reception of the response RF pulse by the reader device. f said seventh and eighth transistors are coupled to one of said plurality of third word lines, a gate of said ninth transistor is coupled to a drain/source path of said seventh transistor, and a drain of said ninth transistor is coupled to a drain/source path of said eighth transistor, wherein each of said plurality of fourth memory cells has a tenth transistor, an eleventh transistor, and a twelfth transistor, gates of said tenth and eleventh transistors are coupled to one of said plurality of fourth word lines, a gate of said twelfth transistor is coupled to a drain/source path of said tenth transistor, and a drain of said twelfth transistor is coupled to a drain/source path of said eleventh transistor, wherein said drain/source paths of said seventh transistors of said third memory cells are coupled to said first wiring line, wherein said drain/source paths of said tenth transistors of said fourth memory cells are coupled to said second wiring line, wherein said drain/source paths of said eighth transistors of said third memory cells are coupled to said second wiring line via said third switch, wherein said drain/source paths of said eleventh transistors of said fourth memory cells are coupled to said second wiring line via said fourth switch, wherein said second memory block is laid between said first and third memory blocks, and wherein said first and second memory blocks are adjacent to each other.