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A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconduc

A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconductor layer is deposited for contacting the layer containing metal. The semiconductor device is annealed to outdiffuse dopants from the layer containing metal into the semiconductor layer to form ohmic contacts therebetween.

대표청구항 ▼

A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconduc

A method for forming ohmic contacts for semiconductor devices, in accordance with the present invention, includes forming a layer containing metal which includes dopants integrally formed therein. The layer containing metal is patterned to form components for a semiconductor device, and a semiconductor layer is deposited for contacting the layer containing metal. The semiconductor device is annealed to outdiffuse dopants from the layer containing metal into the semiconductor layer to form ohmic contacts therebetween. dopants. 13. The method as recited in claim 10, wherein the layer containing metal which includes at least one of phosphorous, antimony, arsenic and boron integrally formed therein. 14. The method as recited in claim 10, wherein the step of depositing a layer containing silicon includes the step of depositing a layer of one of amorphous silicon and polycrystalline silicon. 15. The method as recited in claim 10, wherein the step of annealing the semiconductor device includes the steps of annealing the thin film transistor at temperatures between about 300° C. and about 400° C. for between about 10 and about 30 minutes. 16. The method as recited in claim 10, wherein the step of forming a layer containing metal includes the steps of: forming a metal-dopant layer with dopants integrally formed therein for contacting the layer containing silicon; and forming a conductive layer which contacts the metal-dopant layer. 17. The method as recited in claim 10, wherein the layer containing metal includes a transparent conductive oxide (TCO). 18. The method as recited in claim 10, wherein the step of forming a layer containing metal includes the step of forming the layer containing metal by one of co-sputtering, sputtering from a composite target, and chemical solution deposition. 19. A method for forming ohmic contacts for thin film transistors comprising the steps of: depositing an insulation layer on a substrate; forming a layer containing metal which includes dopants integrally formed therein over the insulation layer; patterning the layer containing metal to form a source and a drain for the thin film transistor having a gap therebetween; depositing a layer containing silicon in contact with the insulation layer in the gap and in contact with the layer containing metal, said layer containing silicon comprising a channel of said thin-film transistor; annealing the thin film transistor to outdiffuse dopants from the layer containing metal into the layer containing silicon to form ohmic contacts therebetween; patterning a gate dielectric over the gap; and forming a gate conductor over the gap. 20. The method as recited in claim 19, wherein the layer containing metal includes at least one of cobalt, molybdenum, titanium, chromium and nickel. 21. The method as recited in claim 19, wherein the layer containing metal which includes dopants integrally formed therein includes between about 1 to about 30 atomic percent of the dopants. 22. The method as recited in claim 19, wherein the layer containing metal which includes at least one of phosphorous, antimony, arsenic and boron integrally formed therein. 23. The method as recited in claim 19, wherein the step of depositing a layer containing silicon includes the step of depositing a layer of one of amorphous silicon and polycrystalline silicon. 24. The method as recited in claim 19, wherein the step of annealing the semiconductor device includes the steps of annealing the thin film transistor at temperatures between about 300° C. and about 400° C. for between about 10 and about 30 minutes. 25. The method as recited in claim 19, wherein the step of forming a layer containing metal includes the steps of: forming a metal-dopant layer with dopants integrally formed therein for contacting the layer containing silicon; and forming a conductive layer which contacts the metal-dopant layer. 26. The method as recited in claim 19, wherein the layer containing metal includes a transparent conductive oxide. 27. The method as recited in claim 19, wherein the step of forming a layer containing metal includes the step of forming the layer containing metal by one of co-sputtering, sputtering from a composite target, and chemical solution deposition.