초록 ▼

More than two surround sound channels are provided within the format of a digital soundtrack system designed to provide only two surround sound channels by matrix encoding from three to five additional surround sound channels into two "discrete" surround sound channels. The digital audio stream of t

More than two surround sound channels are provided within the format of a digital soundtrack system designed to provide only two surround sound channels by matrix encoding from three to five additional surround sound channels into two "discrete" surround sound channels. The digital audio stream of the digital soundtrack system designed to provide only two surround sound channels remains unaltered, thus providing compatibility with existing playback equipment. The format of the media carrying the digital soundtracks also is unaltered. The "discreteness" of the digital soundtrack system is not audibly diminished by employing matrix technology to surround sound channels, particularly if active matrix decoding is employed.

대표청구항 ▼

More than two surround sound channels are provided within the format of a digital soundtrack system designed to provide only two surround sound channels by matrix encoding from three to five additional surround sound channels into two "discrete" surround sound channels. The digital audio stream of t

More than two surround sound channels are provided within the format of a digital soundtrack system designed to provide only two surround sound channels by matrix encoding from three to five additional surround sound channels into two "discrete" surround sound channels. The digital audio stream of the digital soundtrack system designed to provide only two surround sound channels remains unaltered, thus providing compatibility with existing playback equipment. The format of the media carrying the digital soundtracks also is unaltered. The "discreteness" of the digital soundtrack system is not audibly diminished by employing matrix technology to surround sound channels, particularly if active matrix decoding is employed. door opener according to claim 7 wherein said digital data bus is asynchronous. 10. The garage door opener according to claim 8 wherein said microcontroller of said wall console and the microcontroller of said motor drive unit are connected by three wires, a return ground wire, a data wire and a clock wire. 11. The garage door opener according to claim 7 wherein said microcontroller has a control logic that permits a garage door to open and close rapidly until a preselected distance from an end of the door's travel is reached. 12. The garage door opener according to claim 11 wherein the garage door operates downwardly at first rate of travel until a selected point is reached, at which point, the control logic signals the motor drive unit to slow the door to a second rate of travel. 13. The garage door opener according to claim 11 wherein the garage door operates upwardly at first rate of travel until a selected point is reached, at which point, the control logic signals the motor drive unit to slow the door to a second rate of travel. 14. The garage door opener according to claim 11 wherein at least one microcontroller of controls the rate of travel of said door and said microcontroller makes periodic calculations of the door's location during its travel. 15. The garage door opener according to claim 14 wherein said microcontroller compares the location of the door at a given time to during travel to a previous calculation in memory such that when the appropriate location is reached, the microcontroller signals the motor drive unit to slow down. 16. The garage door opener according to claim 7 wherein the motor drive unit is provided with an optical sensor mounted on a gear wheel that is caused to rotate by movement of a belt as the door is raised or lowered and wherein one of said microcontrollers counts the revolutions of the gear wheel as it is turned by the belt to know the location of the door on its path of travel. 17. The garage door opener according to claim 16 wherein the rotations of said gear wheel permits the microcontroller to learn when to stop or slow the door down. 18. The garage door opener according to claim 7 wherein said microcontroller controls an output pin that locks the motor. 19. The garage door opener according to claim 18 wherein the locking mechanism is disengaged by said microcontroller prior to each start of the motor and engaged after the motor ceases. 20. The garage door opener according to claim 19 wherein said microcontroller releases the lock and engages the motor drive unit about 200 milliseconds after the release of the lock. 21. The garage door opener according to claim 7 further comprising a keypad for operating the garage door opener outside of a garage and wherein said keypad is provided with a switch to turn on or off a light in the motor drive unit in the garage. 22. The garage door opener according to claim 7 wherein the garage door opener has a control logic measures door speed during travel of the garage door and adjusts the force of the door opening or closing based on said measurement. 23. The garage door opener according to claim 22 where the control logic measures the door speed approximately 16 times per second during travel of the door. 24. The garage door opener according to claim 23 wherein a tolerance window is created by said control logic during travel of said door, said tolerance window being periodically updated during travel of said door such that the motor drive unit will cease movement of the door if the control logic calculates a door speed outside the tolerance window. 25. The garage door opener according to claim 7 further comprising an keypad for operating the garage door opener outside of a garage and wherein said keypad is able to control two garage door motor drive units connected thereto. es and charger is removably mounted on a vehicle body (2). The batteries (12) and the charger (13) are further integrated with a remaining capacity meter (14) into one body, and the integrated body of batteries, charger and remaining capacity meter is removably mounted on the vehicle body. And, a battery-monitoring CPU for protecting the batteries (12) serves to control the charger. A signal line from the remaining capacity meter (14) and a signal line provided on the vehicle body are connected via a connector, and a display of the remaining capacity meter is provided near a speed meter display.