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Apparatus and method for electrolytically depositing a metal on a workpiece 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C25D-005/10
  • C25D-007/12
  • C25D-005/48
  • C25D-003/38
  • C25D-005/02
출원번호 US-0694413 (2000-10-23)
발명자 / 주소
  • Chen, LinLin
출원인 / 주소
  • Semitool, Inc.
대리인 / 주소
    Perkins Coie LLP
인용정보 피인용 횟수 : 28  인용 특허 : 47

초록

In accordance with one embodiment of the invention, a process for applying a metal to a workpiece is set forth. The workpiece initially includes a seed layer deposited on at least a portion of a surface thereof that is generally unsuitable for bulk electrochemical deposition. The process starts with

대표청구항

In accordance with one embodiment of the invention, a process for applying a metal to a workpiece is set forth. The workpiece initially includes a seed layer deposited on at least a portion of a surface thereof that is generally unsuitable for bulk electrochemical deposition. The process starts with

이 특허에 인용된 특허 (47)

  1. Martin Sylvia, Alkoxylated dimercaptans as copper additives and de-polarizing additives.
  2. Chen LinLin, Apparatus and method for electrolytically depositing a metal on a microelectronic workpiece.
  3. Combs Daniel J. (Sterling Heights MI), Composition and method for electrodeposition of copper.
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  8. Kukanskis Peter E. (Watertown CT) Grunwald John J. (New Haven CT) Ferrier Donald R. (Thomaston CT) Sawoska David A. (Woodbury CT), Electroless copper deposition solution using a hypophosphite reducing agent.
  9. Shacham-Diamand Yosi ; Nguyen Vinh ; Dubin Valery, Electroless deposition of metal films with spray processor.
  10. Herr Roy W. (Troy MI), Electrolyte and method for electrodepositing bright metal deposits.
  11. Lowery Kenneth J. (San Dimas CA), Electrolytic plating apparatus and method.
  12. Tsai Wen-Jye,TWX ; Tsai Ming-Hsing,TWX, Gap filling by two-step plating.
  13. Simpson Cindy Reidsema, Interconnect structure in a semiconductor device and method of formation.
  14. Gardner Donald S., Metal alloy interconnections for integrated circuits.
  15. Chen Lai-Juh,TWX, Method and apparatus for forming very small scale Cu interconnect metallurgy on semiconductor substrates.
  16. Tisdale Stephen L. (Vestal NY) Viehbeck Alfred (Stormville NY), Method for conditioning a substrate for subsequent electroless metal deposition.
  17. Dubin Valery ; Ting Chiu, Method for fabricating copper-aluminum metallization.
  18. Farooq Mukta S. (Hopewell Junction NY) Kaja Suryanarayana (Hopewell Junction NY) Perfecto Eric D. (Poughkeepsie NY) White George E. (Hoffman Estates IL), Method for forming capped copper electrical interconnects.
  19. Tony P. Chiang ; Yu D. Cong ; Peijun Ding ; Jianming Fu ; Howard H. Tang ; Anish Tolia, Method for igniting a plasma in a sputter reactor.
  20. Baum Thomas H. ; Matienzo Luis J. ; Simpson Cindy Reidsema ; Varsik Joseph E., Method for photoselective seeding and metallization of three-dimensional materials.
  21. Dubin Valery ; Nogami Takeshi, Method for reducing oxidation of electroplating chamber contacts and improving uniform electroplating of a substrate.
  22. Polichette Joseph (South Farmingdale NY) Leech Edward J. (Oyster Bay NY), Method for the production of radiant energy imaged printed circuit boards.
  23. Weaver Charles A. (Indianapolis IN), Method of electroplating a conductive layer over an electrolytic capacitor.
  24. Matsunami Takashi,JPX ; Ikeda Masahiko,JPX ; Oka Hiroyuki,JPX, Method of electroplating non-conductive materials.
  25. Cole ; Jr. Herbert Stanley ; Daum Wolfgang, Method of fabricating metallized vias with steep walls.
  26. Arledge John K. (Ft. Lauderdale FL) Swirbel Thomas J. (Davie FL) Barreto Joaquin (Coral Springs FL), Method of metallizing high aspect ratio apertures.
  27. Woodruff Daniel J. ; Hanson Kyle M. ; Oberlitner Thomas H. ; Chen LinLin ; Pedersen John M. ; Zila Vladimir,CAX, Methods and apparatus for processing the surface of a microelectronic workpiece.
  28. Arbach Gary V. (Mahopac NY) O\Toole Terrence R. (Hopewell Junction NY) Viehbeck Alfred (Stormville NY), Multilayer structures of different electroactive materials and methods of fabrication thereof.
  29. Ting Chiu ; Dubin Valery, Plated copper interconnect structure.
  30. Blackwell Kim J. (Owego NY) Matienzo Luis J. (Endicott NY) Knoll Allan R. (Endicott NY), Process for creating organic polymeric substrate with copper.
  31. Makkaev Almaxud M. (ulitsa Zolotodolinskaya ; 29 ; kv. 308 Novosibirsk SUX) Lomovsky Oleg I. (ulitsa Ostrovskogo ; 101a ; kv. 22 Berdsk Novosibirskoi oblasti SUX) Mikhailov Jury I. (ulitsa Maltseva ;, Process for electrochemical metallization of dielectrics.
  32. Gilton Terry L. (Boise ID) Tuttle Mark E. (Boise ID) Cathey David A (Boise ID), Process for metallizing integrated circuits with electrolytically-deposited copper.
  33. Carey David H. (Austin TX) Burger David J. (St. Paul MN), Process for producing electrical circuits with precision surface features.
  34. Hirai Eiji (Tokyo JPX) Kurosawa Kazuyoshi (Tokyo JPX) Matsumura Yoshio (Tokyo JPX), Process for surface treatment titanium-containing metallic material.
  35. Schacham-Diamand Yosef ; Dubin Valery M. ; Ting Chiu H. ; Zhao Bin ; Vasudev Prahalad K. ; Desilva Melvin, Protected encapsulation of catalytic layer for electroless copper interconnect.
  36. Dubin Valery ; Ting Chiu ; Cheung Robin W., Pulse electroplating copper or copper alloys.
  37. Zhao Bin (Austin TX) Vasudev Prahalad K. (Austin TX) Dubin Valery M. (Cupertino CA) Shacham-Diamand Yosef (Ithaca NY) Ting Chiu H. (Saratoga CA), Selective electroless copper deposited interconnect plugs for ULSI applications.
  38. Poris Jaime (409 Capitola Ave. Capitola CA 95010), Selective metal electrodeposition process.
  39. Poris Jaime (21955 Bear Creek Way Los Gatos CA 95030), Selective metal electrodeposition process and apparatus.
  40. Ahmad Umar M. (Hopewell Junction NY) Berger Daniel G. (Poughkeepsie NY) Kumar Ananda (Hopewell Junction NY) LaMaire Susan J. (Yorktown Heights NY) Prasad Keshav B. (New Paltz NY) Ray Sudipta K. (Wapp, Selective plating method for forming integral via and wiring layers.
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  44. Cabral ; Jr. Cyril (Ossining NY) Colgan Evan George (Suffern NY) Grill Alfred (White Plains NY), Thin film multi-layer oxygen diffusion barrier consisting of aluminum on refractory metal.
  45. Shimauchi Hidenori (Takatsuki JPX) Suzuki Keijiro (Tokyo JPX), Tin whisker-free tin or tin alloy plated article and coating technique thereof.
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이 특허를 인용한 특허 (28)

  1. Chen,Linlin; Wilson,Gregory J.; McHugh,Paul R.; Weaver,Robert A.; Ritzdorf,Thomas L., Apparatus and method for electrochemically depositing metal on a semiconductor workpiece.
  2. Chen,Linlin; Wilson,Gregory J.; McHugh,Paul R.; Weaver,Robert A.; Ritzdorf,Thomas L., Apparatus and method for electrochemically depositing metal on a semiconductor workpiece.
  3. Chopra, Dinesh, Combined barrier layer and seed layer.
  4. Weidman, Timothy W.; Wijekoon, Kapila P.; Zhu, Zhize; Gelatos, Avgerinos V. (Jerry); Khandelwal, Amit; Shanmugasundram, Arulkumar; Yang, Michael X.; Mei, Fang; Moghadam, Farhad K., Contact metallization scheme using a barrier layer over a silicide layer.
  5. Chopra,Dinesh, Electrochemical reaction cell for a combined barrier layer and seed layer.
  6. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  7. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  8. Farrar,Paul A., Electronic apparatus having a core conductive structure within an insulating layer.
  9. Matusch, Stephan Frank, High capacity anode preparation apparatus.
  10. Farrar,Paul A., Hplasma treatment.
  11. Farrar, Paul A., Integrated circuit and seed layers.
  12. Farrar,Paul A., Integrated circuit and seed layers.
  13. Hey, Peter; Kwak, Byung-Sung Leo, Method and apparatus to overcome anomalies in copper seed layers and to tune for feature size and aspect ratio.
  14. Lopatin,Sergey; Shanmugasundram,Arulkumar; Lubomirsky,Dmitry; Pancham,Ian A., Method for forming CoWRe alloys by electroless deposition.
  15. Zheng, Bo; Bajaj, Rajeev; Wang, Zhonghui Alex, Method for regulating the electrical power applied to a substrate during an immersion process.
  16. Zheng, Bo; Wang, Hougong; Dixit, Girish; Chen, Fusen, Method of application of electrical biasing to enhance metal deposition.
  17. Ahn, Kie Y.; Forbes, Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  18. Ahn,Kie Y.; Forbes,Leonard, Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals.
  19. Ahn,Kie Y.; Forbes,Leonard, Methods for making integrated-circuit wiring from copper, silver, gold, and other metals.
  20. Ahn,Kie Y.; Forbes,Leonard, Methods for making integrated-circuit wiring from copper, silver, gold, and other metals.
  21. Collins,Dale W., Microelectronic workpiece for electrochemical deposition processing and methods of manufacturing and using such microelectronic workpieces.
  22. Lubomirsky, Dmitry; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Kovarsky, Nicolay Y.; Wijekoon, Kapila, Process for electroless copper deposition.
  23. Ahn,Kie Y.; Forbes,Leonard, Selective electroless-plated copper metallization.
  24. Farrar, Paul A., Structures and methods to enhance copper metallization.
  25. Farrar, Paul A., Structures and methods to enhance copper metallization.
  26. Farrar,Paul A., Structures and methods to enhance copper metallization.
  27. Farrar,Paul A., Structures and methods to enhance copper metallization.
  28. Wang,You; Chang,Anzhong; Dukovic,John O., Substrate support element for an electrochemical plating cell.
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