초록 ▼

Electro-static-discharge (ESD) protection of an integrated circuit chip is enhanced by an EOS protection circuit using external components. An external MOSFET is placed in series with the ground pin of the integrated circuit chip. The external MOSFET has a gate coupled to a power bus through a gate

Electro-static-discharge (ESD) protection of an integrated circuit chip is enhanced by an EOS protection circuit using external components. An external MOSFET is placed in series with the ground pin of the integrated circuit chip. The external MOSFET has a gate coupled to a power bus through a gate resistor, and is bypassed by an ESD capacitor. The external MOSFET turns on after a delay when power is applied during hot insertion. The delay is determined by a power-to-ground bypass capacitor. The time delay of the on stage of the MOSFET inhibits ground current generated by EOS voltage leaked from the power supply through parasitic resistances, capacitances, and inductances, preventing ESD-protection diodes inside the chip from burning out from this EOS pulses that occur during hot insertion. The ESD bypass capacitor shunts the initial ESD pulse to ground before the external MOSFET turns on.

대표청구항 ▼

Electro-static-discharge (ESD) protection of an integrated circuit chip is enhanced by an EOS protection circuit using external components. An external MOSFET is placed in series with the ground pin of the integrated circuit chip. The external MOSFET has a gate coupled to a power bus through a gate

Electro-static-discharge (ESD) protection of an integrated circuit chip is enhanced by an EOS protection circuit using external components. An external MOSFET is placed in series with the ground pin of the integrated circuit chip. The external MOSFET has a gate coupled to a power bus through a gate resistor, and is bypassed by an ESD capacitor. The external MOSFET turns on after a delay when power is applied during hot insertion. The delay is determined by a power-to-ground bypass capacitor. The time delay of the on stage of the MOSFET inhibits ground current generated by EOS voltage leaked from the power supply through parasitic resistances, capacitances, and inductances, preventing ESD-protection diodes inside the chip from burning out from this EOS pulses that occur during hot insertion. The ESD bypass capacitor shunts the initial ESD pulse to ground before the external MOSFET turns on. th direction of the slider and which start from respective trailing edges of the surface having the element and the trailing ABS face and gradually approach a side face of the slider when proceeding toward the leading side, and wherein a gap portion of the magnetic element is located in the vicinity of the angled surfaces. 10. A magnetic head according to claim 9, wherein the angled surface of the surface having the element and the angled surface of the trailing ABS face are continuous. 11. A magnetic head according to claim 9, wherein each of the surface having the element and the trailing ABS face is provided with two angled surfaces at both sides thereof, each of the angled surfaces of the surface having the element and the trailing ABS face being angled relative to a width direction of the slider and starting from the trailing edge and gradually approaching the corresponding side face of the slider when proceeding toward the leading side, and the gap portion of the magnetic element is located between the two angled surfaces of the surface having the element and the trailing ABS face. 12. A magnetic head according to claim 1, wherein between a leading edge of the trailing ABS face and the surface facing the recording medium, a step face having a height lower than that of the ABS face is formed. 13. A magnetic head comprising: a slider; and a magnetic element disposed on an end face of the slider in the trailing side for writing and/or reading, wherein a plurality of ABS faces are formed on a sur