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Sockets for "springed" semiconductor devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/04
  • H01L-023/48
출원번호 US-0299131 (2002-11-19)
발명자 / 주소
  • Dozier, II, Thomas H.
  • Eldridge, Benjamin N.
  • Grube, Gary W.
  • Khandros, Igor Y.
  • Mathieu, Gaetan L.
  • Pederson, David V.
  • Stadt, Michael A.
출원인 / 주소
  • FormFactor, Inc.
대리인 / 주소
    Merkadeau, Stuart L.Burraston, N. Kenneth
인용정보 피인용 횟수 : 63  인용 특허 : 45

초록

Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally u

대표청구항

1. An electronic apparatus comprising: an electronic device; a plurality of elongate spring contacts attached to said electronic device, free ends of said elongate spring contacts extending away from said electronic device; a substrate; a plurality of conductive recesses formed in said substra

이 특허에 인용된 특허 (45)

  1. Grabbe Dimitry (2160 Rosedale Ave. Middletown PA 17057), Ball grid array socket.
  2. Wood Alan G. (Boise ID) Farnworth Warren M. (Nampa ID) Hembree David R. (Boise ID), Carrier for testing an unpackaged semiconductor die.
  3. Wakefield Elwyn P. M. (Bristol GB2), Circuit connection in an electrical assembly.
  4. Oi Kenichi (Osaka JPX), Combined board construction for burn-in and burn-in equipment for use with combined board.
  5. Khandros Igor Y. ; Mathieu Gaetan L., Composite interconnection element for microelectronic components, and method of making same.
  6. Matsumoto Kunio (Yokohama JPX) Oshima Muneo (Yokohama JPX) Sakaguchi Suguru (Chigasaki JPX), Connecting structure for electronic part and method of manufacturing the same.
  7. Wood Alan G. (Boise ID) Corbett Tim J. (Boise ID) Chadwick Gary L. (Boise ID) Huang Chender (Boise ID) Kinsman Larry D. (Boise ID), Discrete die burn-in for non-packaged die.
  8. Baumberger John G. (Johnson City NY) Kershaw James J. (Endwell NY) Petrozello James R. (Endicott NY), Dual element electrical contact and connector assembly utilizing same.
  9. O\Connor Bruce (San Diego County CA) Swendrowski Steve (San Diego County CA) Toth Thomas (San Diego County CA), Electrical device transport medium.
  10. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  11. Chang David D. C. (Princeton NJ), Electrical test apparatus and method.
  12. Kazama Toshio,JPX, Electroconductive spring contact unit.
  13. Alcoe David James ; Caletka David Vincent, Electronic component test apparatus with rotational probe and conductive spaced apart means.
  14. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L., Fabricating interconnects and tips using sacrificial substrates.
  15. Khandros Igor Y. ; Mathieu Gaetan L., Flexible contact structure with an electrically conductive shell.
  16. Grabbe Dimitry G. (Middletown PA), High density connector for an IC chip carrier.
  17. Ito Akihiko (Hanyu JPX) Kobayashi Yoshihito (Gyoda JPX), IC carrier for use with an IC handler.
  18. Matsuoka Noriyuki (Yokohama JPX) Uratsuji Kazumi (Tokyo JPX), IC socket.
  19. Bamford William C. (Hinsdale IL), Integrated circuit carrier assembly.
  20. Reymond Welles K. (Waterbury CT), Integrated circuit packages using tapered spring contact leads for direct mounting to circuit boards.
  21. Carlomagno William D. (Redwood City CA) Cummings Dennis E. (Placerville CA) Gliga Alexandru S. (San Jose CA), Interconnection of electronic components.
  22. Bargain Raymond (Sartrouville FRX) Riverie Jean (Limours FRX) Ollivier Jean-Francois (Versailles FRX), Intermediate connector for use between a printed circuit card and a substrate for electronic circuits.
  23. Lee Shaw Wei (10410 Miller Ave. Cupertino CA 95014), Known good die test apparatus and method.
  24. Dennis Richard Kay (Etters PA) Hadden Edward Leal (Mechanicsburg PA), Leadless package retaining frame.
  25. Queyssac Daniel G., Low-profile removable ball-grid-array integrated circuit package.
  26. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of exercising semiconductor devices.
  27. DiStefano Thomas H. (Monte Sereno CA) Smith ; Jr. John W. (Austin TX), Microelectronics unit mounting with multiple lead bonding.
  28. Geib James F. (Smithfield RI), Minimum insertion force self-cleaning anti-overstress PLCC receiving socket.
  29. Hopkins John R. (Cambridge MD) Ritchie Leon T. (Clearwater FL), Multi terminal low insertion force connector.
  30. Elder Richard A. (Dallas TX) Johnson Randy (Carrollton TX) Frew Dean L. (Garland TX) Wilson Arthur M. (Dallas TX), Non-destructive burn-in test socket for integrated circuit die.
  31. Beaman Brian Samuel ; Fogel Keith Edward ; Lauro Paul Alfred ; Shih Da-Yuan, Pluggable chip scale package.
  32. Lee James C. K. (Los Altos CA) Amdahl Gene M. (Atherton CA) Beck Richard L. (Cupertino CA) Quinn Robert F. (Cupertino CA) Sochor Jerzy R. (San Jose CA), Semiconductor chip interface.
  33. Otsuka Kanji (Higashiyamato JPX) Kato Masao (Hadano JPX) Kumagai Takashi (Isehara JPX) Usami Mitsuo (Ohme JPX) Kuroda Shigeo (Ohme JPX) Sahara Kunizo (Nishitama JPX) Yamada Takeo (Koganei JPX) Miyamo, Semiconductor device having leads for mounting to a surface of a printed circuit board.
  34. Higashi Tatsushi,JPX ; Kuroda Akihiro,JPX ; Tosa Hiroaki,JPX, Semiconductor device with test terminal and IC socket.
  35. Dozier ; II Thomas H. ; Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Sockets for electronic components and methods of connecting to electronic components.
  36. Reymond Welles K. (Waterbury CT), Spring biased tapered contact elements for electrical connectors and integrated circuit packages.
  37. Khandros Igor Y. ; Pedersen David V., Stacking semiconductor devices, particularly memory chips.
  38. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA), Tandem loop contact for an electrical connector.
  39. Barabi Nasser, Test socket for an IC device.
  40. Ikeya Kiyokazu,JPX ; Padovani Francois A., Test socket for detachable IC chip.
  41. Pfaff Wayne K. (309 Steeplechase Irving TX 75062), Test socket for electronic device packages.
  42. Beaman Brian S. (Hyde Park NY) Doany Fuad E. (Katonah NY) Fogel Keith E. (Bardonia NY) Hedrick ; Jr. James L. (Oakland CA) Lauro Paul A. (Nanuet NY) Norcott Maurice H. (Valley Cottage NY) Ritsko John, Three dimensional high performance interconnection package.
  43. Cray Seymour R. (Chippewa Falls WI) Krajewski Nicholas J. (Elk Mound WI), Three dimensionally interconnected module assembly.
  44. Shiraishi Shogo (Kitakyushu JPX), Universal probe card for use in a semiconductor chip die sorter test.
  45. Khandros Igor Y. ; Pedersen David V., Wafer-level burn-in and test.

이 특허를 인용한 특허 (63)

  1. Strid, Eric; Gleason, K. Reed, Active wafer probe.
  2. Strid,Eric; Gleason,K. Reed, Active wafer probe.
  3. Strid, Eric; Campbell, Richard, Calibration structures for differential signal probing.
  4. Campbell, Richard; Strid, Eric W.; Andrews, Mike, Differential signal probe with integral balun.
  5. Strid, Eric; Campbell, Richard, Differential signal probing system.
  6. Campbell, Richard L.; Andrews, Michael, Differential waveguide probe.
  7. Burcham, Terry; McCann, Peter; Jones, Rod, Double sided probing structures.
  8. Burcham,Terry; McCann,Peter; Jones,Rod, Double sided probing structures.
  9. Andrews, Peter; Hess, David; New, Robert, Interface for testing semiconductors.
  10. Tervo,Paul A.; Cowan,Clarence E., Low-current pogo probe card.
  11. Tervo,Paul A.; Cowan,Clarence E., Low-current pogo probe card.
  12. Schwindt,Randy J., Low-current probe card.
  13. Gleason, K. Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing method using improved contact.
  14. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing method using improved contact.
  15. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing structure with laterally scrubbing contacts.
  16. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing system.
  17. Gleason,Reed; Bayne,Michael A.; Smith,Kenneth; Lesher,Timothy; Koxxy,Martin, Membrane probing system.
  18. Gleason,Reed; Bayne,Michael A.; Smith,Kenneth; Lesher,Timothy; Koxxy,Martin, Membrane probing system.
  19. Smith,Kenneth; Gleason,Reed, Membrane probing system.
  20. Smith,Kenneth; Gleason,Reed, Membrane probing system.
  21. Tervo,Paul A.; Smith,Kenneth R.; Cowan,Clarence E.; Dauphinais,Mike P.; Koxxy,Martin J., Membrane probing system.
  22. Tervo,Paul A.; Smith,Kenneth R.; Cowan,Clarence E.; Dauphinais,Mike P.; Koxxy,Martin J., Membrane probing system.
  23. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing system with local contact scrub.
  24. Gleason,K. Reed; Smith,Kenneth R.; Bayne,Mike, Membrane probing system with local contact scrub.
  25. Gleason,Reed; Bayne,Michael A.; Smith,Kenneth, Method for constructing a membrane probe using a depression.
  26. Hayden, Leonard; Martin, John; Andrews, Mike, Method of assembling a wafer probe.
  27. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth, Method of constructing a membrane probe.
  28. Smith, Kenneth R., Method of replacing an existing contact of a wafer probing assembly.
  29. Strid,Eric; Campbell,Richard, On-wafer test structures for differential signals.
  30. Tervo,Paul A.; Cowan,Clarence E., POGO probe card for low current measurements.
  31. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  32. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  33. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  34. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  35. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  36. Campbell,Richard L.; Andrews,Michael; Bui,Lynh, Probe for high frequency signals.
  37. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Probe for testing a device under test.
  38. Smith, Kenneth; Jolley, Michael; Van Syckel, Victoria, Probe head having a membrane suspended probe.
  39. Smith,Kenneth; Jolley,Michael; Van Syckel,Victoria, Probe head having a membrane suspended probe.
  40. Schwindt,Randy, Probe holder for testing of a test device.
  41. Smith, Kenneth R.; Hayward, Roger, Probing apparatus with impedance optimized interface.
  42. Smith, Kenneth R., Replaceable coupon for a probing apparatus.
  43. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for high-frequency testing of a device under test.
  44. Gleason, K. Reed; Lesher, Tim; Strid, Eric W.; Andrews, Mike; Martin, John; Dunklee, John; Hayden, Leonard; Safwat, Amr M. E., Shielded probe for testing a device under test.
  45. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  46. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  47. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  48. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  49. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for testing a device under test.
  50. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for testing a device under test.
  51. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe with low contact resistance for testing a device under test.
  52. Pedersen, David V.; Eldridge, Benjamin N.; Khandros, Igor Y., Socket for making with electronic component, particularly semiconductor device with spring packaging, for fixturing, testing, burning-in or operating such a component.
  53. Pedersen,David V.; Eldridge,Benjamin N.; Khandros,Igor Y., Socket for mating with electronic component, particularly semiconductor device with spring packaging, for fixturing, testing, burning-in or operating such a component.
  54. Dozier, II,Thomas H.; Eldridge,Benjamin N.; Grube,Gary W.; Khandros,Igor Y.; Mathieu,Gaetan L.; Pedersen,David V.; Stadt,Michael A., Sockets for "springed" semiconductor devices.
  55. Andrews, Peter; Hess, David, System for testing semiconductors.
  56. Miller, Charles A.; Cooper, Timothy E.; Hatsukano, Yoshikazu, Test method for yielding a known good die.
  57. Campbell, Richard, Test structure and probe for differential signals.
  58. Campbell,Richard, Test structure and probe for differential signals.
  59. Hayden, Leonard; Martin, John; Andrews, Mike, Wafer probe.
  60. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
  61. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
  62. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
  63. Campbell, Richard, Wideband active-passive differential signal probe.
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