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A direct dual filling device for sealing agents capable of transferring a material from a commercially available material container to a material applicator. The filling device of the present invention comprises a hood defining at least one receiving aperture, an applicator interface in communicatio

A direct dual filling device for sealing agents capable of transferring a material from a commercially available material container to a material applicator. The filling device of the present invention comprises a hood defining at least one receiving aperture, an applicator interface in communication with the hood and having at least one filling port formed thereon, at least one transfer conduit in communication with the at least one filling port, at least one withdrawal cannula located within the receiving aperture and in communication with the at least one transfer conduit, and a container support device capable of receiving and supporting at least one material container in an upright tilted position within the receiving aperture. The hood may include at least one engaging surface and at least one displacement recess. In addition, the container support device may include at least one biasing member capable of biasing the material container from an upright position to an upright tilted position, thereby enabling the withdrawal of substantially all the material from the material container.

대표청구항 ▼

A direct dual filling device for sealing agents capable of transferring a material from a commercially available material container to a material applicator. The filling device of the present invention comprises a hood defining at least one receiving aperture, an applicator interface in communicatio

A direct dual filling device for sealing agents capable of transferring a material from a commercially available material container to a material applicator. The filling device of the present invention comprises a hood defining at least one receiving aperture, an applicator interface in communication with the hood and having at least one filling port formed thereon, at least one transfer conduit in communication with the at least one filling port, at least one withdrawal cannula located within the receiving aperture and in communication with the at least one transfer conduit, and a container support device capable of receiving and supporting at least one material container in an upright tilted position within the receiving aperture. The hood may include at least one engaging surface and at least one displacement recess. In addition, the container support device may include at least one biasing member capable of biasing the material container from an upright position to an upright tilted position, thereby enabling the withdrawal of substantially all the material from the material container. n is disposed in the substrate in an area under a first word line and an area under the second bit line, and the third bit cell region is disposed in the substrate in an area under a second word line and an area under the second bit line, wherein the first and second bit cell regions substantially consist of an isolating dielectric material; and wherein the second bit cell region and the third bit cell region are disposed in the substrate between a first ground region in the substrate and a second ground region in the substrate. 5. The ROM of claim 1 wherein the first bit cell region includes a first drain region formed with a N+ diffusion region, and a first source region formed with a N+ diffusion region, wherein the first drain region and the first source region are formed simultaneously. 6. A ROM for storing information, including: a substrate having a plurality of bit cell regions formed in substrate; a plurality of columns of bit lines disposed proximate to the substrate; a plurality of rows of word lines disposed proximate to the substrate; wherein intersection areas between the plurality of bit lines and the plurality of the word lines form nodes which correspond to the plurality of bit cell regions formed in the substrate; a first bit cell region, which corresponds to a first node, wherein a first transistor is formed in the first bit cell region, and wherein a first bit line at the first node is coupled to the first transistor by a first contact; and a second bit cell region which corresponds to a second node, wherein the second bit cell region consists substantially of an isolating dielectric material. 7. The ROM of claim 6 wherein a second bit line at the second node is separated from the second bit cell region by an insulating layer. 8. The ROM of claim 6 wherein the second node corresponds to the second bit cell region and to a third bit cell region, wherein the second bit cell region is disposed in the substrate in an area under a first word line and an area under a second bit line, and the third bit cell region is disposed in the substrate in an area under a second word line and an area under the second bit line, wherein the second and third bit cell regions substantially consist of an isolating dielectric material. 9. A ROM for storing information, including: a substrate having a plurality of bit cell regions formed in substrate; a plurality of columns of bit lines disposed proximate to the substrate; a plurality of rows of word lines disposed proximate to the substrate; wherein intersection areas between the plurality of bit lines and the plurality of the word lines form nodes which correspond to the plurality of bit cell regions formed in the substrate; a first bit cell region, which corresponds to a first node, wherein a first transistor is formed in the first bit cell region, and wherein a first bit line at the first node is coupled to the first transistor by a first contact; a second bit cell region which corresponds to a second node, wherein the second bit cell region consists substantially of an isolating dielectric material; wherein the second node corresponds to the second bit cell region and to a third bit cell region, wherein the second bit cell region is disposed in the substrate in an area under a first word line and an area under a second bit line, and the third bit cell region is disposed in the substrate in an area under a second word line and an area under the second bit line, wherein the second and third bit cell regions substantially consist of an isolating dielectric material; and wherein the second bit cell region and the third bit cell region are disposed in a substrate between a first ground region in the substrate and a second ground region in the substrate. 10. The ROM of claim 6 wherein the first bit cell region includes a first drain region formed with an N+ diffusion area and a first source region formed with an N+ diffusion area wherein the source and drain