초록 ▼

Apparatus, and a corresponding method, present to a customer various forms of information (product, brand . . . ) during periods where the customer is idle. A signal indicating the start or impending start of idle time is used to present to the customer various offers in a series of interactions bet

Apparatus, and a corresponding method, present to a customer various forms of information (product, brand . . . ) during periods where the customer is idle. A signal indicating the start or impending start of idle time is used to present to the customer various offers in a series of interactions between a computer interface and the customer. The interactions are planned based on previously acquired information about the customer, the current transaction, the venue of the transaction, the time of day and the date of the transaction, and the history of prior customer activities. The method of the invention enables a system of computers to collect information about the characteristics of a customer in a retail, banking or service establishment utilizing a point-of-sale terminal, which has input and output devices that the customer can use to communicate with the system of computers for identification purposes and to select from various options presented to the customer. The information concerning the customer's activities are accumulated and analyzed such that the resulting information can be used to improve the efficiency of the customer's next interaction with the system in the same or different venues. The efficiency increase results from a fitting of a set of possible activities into the idle time, in such a manner as to select a set of activities and their order that will provide the highest value likelihood that the customer will complete each activity.

대표청구항 ▼

Apparatus, and a corresponding method, present to a customer various forms of information (product, brand . . . ) during periods where the customer is idle. A signal indicating the start or impending start of idle time is used to present to the customer various offers in a series of interactions bet

Apparatus, and a corresponding method, present to a customer various forms of information (product, brand . . . ) during periods where the customer is idle. A signal indicating the start or impending start of idle time is used to present to the customer various offers in a series of interactions between a computer interface and the customer. The interactions are planned based on previously acquired information about the customer, the current transaction, the venue of the transaction, the time of day and the date of the transaction, and the history of prior customer activities. The method of the invention enables a system of computers to collect information about the characteristics of a customer in a retail, banking or service establishment utilizing a point-of-sale terminal, which has input and output devices that the customer can use to communicate with the system of computers for identification purposes and to select from various options presented to the customer. The information concerning the customer's activities are accumulated and analyzed such that the resulting information can be used to improve the efficiency of the customer's next interaction with the system in the same or different venues. The efficiency increase results from a fitting of a set of possible activities into the idle time, in such a manner as to select a set of activities and their order that will provide the highest value likelihood that the customer will complete each activity. h of the third plurality of interconnect boards are reconfigurable to cooperate with the first and second plurality of interconnect chips of each of the first and second plurality of interconnect boards to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards. 3. The emulation system of claim 2, wherein each of the fourth plurality of interconnect boards further comprises a second plurality of expansion connectors, and the emulation system further comprises a first plurality of flex printed circuit boards (PCBs) correspondingly coupling selected ones of the first plurality of expansion connectors of each of the second plurality of interconnect boards to selected ones of the second plurality of expansion connectors of each of the fourth plurality of interconnect boards. 4. The emulation system of claim 2, wherein the first and second plurality of logic boards, and the first, second, third and fourth interconnect boards are packaged in a single cabinet with the first plurality of logic boards and the first and second interconnect boards occupying an upper portion of the cabinet, and the second plurality of logic boards and the third and fourth interconnect boards occupying a lower portion of the cabinet. 5. The emulation system of claim 2, wherein each of the fourth plurality of interconnect boards includes a fourth plurality of interconnect chips, and wherein the fourth plurality of interconnect chips of each of the fourth plurality of interconnect boards are also reconfigurable to cooperate with the first, second and third interconnect chips of each of the first, second and third plurality of interconnect boards to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards. 6. The emulation system of claim 5, wherein the first and second plurality of logic boards, and the first, second, third and fourth interconnect boards are packaged in a single cabinet with the first plurality of logic boards and the first and second interconnect boards occupying an upper portion of the cabinet, and the second plurality of logic boards and the third and fourth interconnect boards occupying a lower portion of the cabinet. 7. The emulation system of claim 5, wherein the emulation system further comprises: (e) a fifth and a sixth plurality of interconnect boards corresponding coupled to the second and fourth plurality of logic boards through the first and second plurality of expansion connectors of each of the second and fourth plurality of logic boards, and a seventh plurality of interconnect boards orthogonally coupled to the fifth and sixth plurality of interconnect boards, wherein each of the fifth, sixth and seventh plurality of interconnect boards includes a fifth, sixth and seventh plurality of interconnect chips, and wherein the fifth, sixth and seventh plurality of interconnect chips of each of the fifth, sixth and seventh plurality of interconnect boards are reconfigurable to cooperate with the first, second, third and fourth plurality of interconnect chips of each of the first, second, third and fourth plurality of the interconnect boards to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards. 8. The emulation system of claim 7, wherein the first and second plurality of logic boards, and the first, second, third, fourth, fifth, sixth and seventh interconnect boards are packaged in three cabinets with the first plurality of logic boards and the first and second interconnect boards occupying a first cabinet, the second plurality of logic boards and the third and fourth interconnect boards occupying a second cabinet, and the fifth, sixth and seventh interconnect boards occupying a third cabinet. 9. The emulation system of claim 5, wherein the emulation system further comprises: (e) a fifth and a sixth plurality of interconnect boards corresponding coupled to the seco nd and fourth plurality of interconnect boards through the first and second plurality of expansion connectors of each of the second and fourth plurality of interconnect boards, a seventh and an eighth plurality of interconnect boards correspondingly coupled to each other and orthogonally coupled to the fifth and sixth plurality of interconnect boards respectively, wherein each of the fifth, sixth and seventh plurality of interconnect boards includes a fifth, sixth and seventh plurality of interconnect chips, and wherein the fifth, sixth and seventh plurality of interconnect chips of each of the fifth, sixth and seventh plurality of interconnect boards are reconfigurable to cooperate with the first, second, third and fourth plurality of interconnect chips of each of the first, second, third and fourth plurality of interconnect boards to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards. 10. The emulation system of claim 9, wherein the first and second plurality of logic boards, and the first, second, third, fourth, fifth, sixth, seventh and eighth interconnect boards are packaged in three cabinets with the first plurality of logic boards and the first and second interconnect boards occupying a first cabinet, the second plurality of logic boards and the third and fourth interconnect boards occupying a second cabinet, and the fifth, sixth and seventh interconnect boards occupying a third cabinet. 11. The emulation system of claim 9, wherein each of the seventh plurality of interconnect boards includes a third plurality of expansion connectors, each of the eighth plurality of interconnect boards includes a fourth plurality of expansion connectors, and the emulation system further comprises a plurality of flex printed circuit boards (PCBs) correspondingly coupling the third plurality of expansion connectors of each of the seventh plurality of interconnect boards to the fourth plurality of expansion connectors of each of the eighth plurality of interconnect boards. 12. The emulation system of claim 9, wherein each of the eighth plurality of interconnect boards includes an eighth plurality of interconnect chips, and wherein the eighth plurality of interconnect chips of each of the eighth plurality of interconnect boards are also reconfigurable to cooperate with the first, second, third, fourth, fifth, sixth and seventh interconnect chips of each of the first, second, third, fourth, fifth, sixth and seventh interconnect boards to selectively interconnect the logic chips of different ones of the first and second plurality of logic boards. 13. An apparatus comprising (a) a first plurality of logic boards, a first plurality of interconnect boards corresponding coupled to the first plurality of logic boards, and a second plurality of interconnect boards orthogonally coupled to the first plurality of interconnect boards, wherein each of the second plurality of interconnect boards further includes a first plurality of expansion connectors; and (b) a second plurality of logic boards, a third plurality of interconnect boards corresponding coupled to the second plurality of logic boards, and a fourth plurality of interconnect boards orthogonally coupled to the third plurality of interconnect boards and correspondingly coupled to the second plurality of interconnect boards through selected ones of the first plurality of expansion connectors of each of the second plurality of interconnect boards. 14. The apparatus of claim 13, wherein each of the fourth plurality of interconnect boards further comprises a second plurality of expansion connectors, and the emulation system further comprises a first plurality of flex printed circuit boards (PCBs) correspondingly coupling selected ones of the first plurality of expansion connectors of each of the second plurality of interconnect boards to selected ones of the second plurality of expansion connectors of each of the fourth plura