By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizi
By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.
대표청구항▼
By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizi
By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer. [Other References] Hempel et al., "Needle-Like Crystallization of Ni Doped Amorphous Silicon Thin Films", pp. 921-924, Mar. 1993, Solid State Communications, vol. 85, No. 11. Kakkad et al., "Low Temperature Selective Crystallization of Amorphous Silicon", pp. 66-68, Dec. 1989, Journal of Non-Crystalline Solids, vol. 115. Dvurechenski et al., "Transport Phenomena is Amorphous Silicon Doped by Ion Implantation of 3D metals", pp. 635-640, Nov. 1989, Phys. Stat. Sol., vol. 95. Hayzelden et al., "In situ Transmission Electron Microscopy Studies of Silicide-Mediated Crystallization of Amorphous Silicon", pp. 225-227, Oct. 1991, Appl. Phys. Lett., vol. 60, No. 2. Kakkad et al., "Crystallized Si Films by Low-Temperature Rapid Thermal Annealing of Amorphous Silicon", pp. 2069-2072, Nov. 1988, Journal of Applied Physics, vol. 65. Liu et al., "Polycrystalline Silicon Thin Film Transistors on Corning 7059 Glass Substrates Using Short Time, Low-Temperature Processing", pp. 2554-2556, Feb. 1993, Appl. Phys. Lett., vol. 62, No. 20. Liu et al., "Selective Area Crystallization of Amorphous Silicon Films by Low-Temperature Rapid Thermal Annealing", pp. 660-662, Jun. 1989, Appl. Phys. Lett., vol. 55, No. 7., Edelman et al., "Structure and Transport Properties of Microcrystalline SiGe Films", pp. 232-235, Apr. 1997, IEEE 16th Int'l Conference on Thermaelectronics.
연구과제 타임라인
LOADING...
LOADING...
LOADING...
LOADING...
LOADING...
이 특허에 인용된 특허 (23)
Matsumoto Hiroshi (Hachioji JPX), Active matrix liquid crystal display having a peripheral driving circuit element.
Nakagawa Hideo,JPX ; Hayashi Shigenori,JPX ; Nakayama Ichiro,JPX ; Okumura Tomohiro,JPX, Apparatus and method for applying RF power apparatus and method for generating plasma and apparatus and method for processing with plasma.
Friend Richard H. (Cambridge NY GBX) Burroughes Jeremy H. (New York NY) Bradley Donal D. (Cambridge GBX), Method of manufacturing of electrolumineschent devices.
Zavracky Paul M. (Norwood MA) Fan John C. C. (Chestnut Hill MA) McClelland Robert (Norwell MA) Jacobsen Jeffrey (Hollister CA) Dingle Brenda (Norton MA), Single crystal silicon transistors for display panels.
Yamazaki, Shunpei; Takayama, Toru; Murakami, Satoshi; Kimura, Hajime, Display device including an opening formed in a gate insulating film, a passivation film, and a barrier film.
Suzawa,Hideomi; Ono,Koji; Ohnuma,Hideto; Yamagata,Hirokazu; Yamazaki,Shunpei, Method of forming thin film transistors having tapered gate electrode and curved insulating film.
Yamazaki, Shunpei; Suzawa, Hideomi; Ono, Koji; Arai, Yasuyuki, Semiconductor device having a gate insulting film with thick portions aligned with a tapered gate electrode.
Yamazaki,Shunpei; Fujimoto,Etsuko; Isobe,Atsuo; Takayama,Toru; Fukuchi,Kunihiko, Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.