IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0841154
(2001-04-23)
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발명자
/ 주소 |
- Eveland, Doug C.
- Marable, William R.
- Rogers, Bobby E.
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
65 인용 특허 :
106 |
초록
▼
Access to medical monitoring device service is controlled by inputting a set of identification data elements into a medical monitoring device system, which then establishes a communication link with a central unit and communicating the set of identification data elements to the central unit. The med
Access to medical monitoring device service is controlled by inputting a set of identification data elements into a medical monitoring device system, which then establishes a communication link with a central unit and communicating the set of identification data elements to the central unit. The medical monitoring device system and the central unit cooperatively determining whether the medical monitoring device may be activated for rendering medical monitoring device service, by evaluating the set of identification data elements as to whether they meet a set of basic structural requirements, and obtaining financial or other authorization from a third-party source. In the event that the identification data elements meet the set of basic structural requirements and the authorization is obtained, the central, unit issues an activation signal to the medical monitoring device system over the communication link.
대표청구항
▼
Access to medical monitoring device service is controlled by inputting a set of identification data elements into a medical monitoring device system, which then establishes a communication link with a central unit and communicating the set of identification data elements to the central unit. The med
Access to medical monitoring device service is controlled by inputting a set of identification data elements into a medical monitoring device system, which then establishes a communication link with a central unit and communicating the set of identification data elements to the central unit. The medical monitoring device system and the central unit cooperatively determining whether the medical monitoring device may be activated for rendering medical monitoring device service, by evaluating the set of identification data elements as to whether they meet a set of basic structural requirements, and obtaining financial or other authorization from a third-party source. In the event that the identification data elements meet the set of basic structural requirements and the authorization is obtained, the central, unit issues an activation signal to the medical monitoring device system over the communication link. uch that a ratio of the output of the slew based clock multiplier to the master clock is the same as a ratio of said second current source to said first current source. 3. A slew based clock multiplier as claimed in claim 2, said circuit further comprising a first capacitor and a second capacitor, said circuit configured such that a ratio of the output of the slew based clock multiplier to the master clock is the same as a ratio of said first capacitor to said second capacitor. 4. A slew based clock multiplier comprising a circuit which is configured to output a fraction of a master clock without having to use as a reference an edge of a clock having a higher frequency than a frequency of the master clock, and without having to use precision delay cells to delay edges of the master clock, wherein said circuit is configured to receive a first current source and a second current source, said circuit further comprising a first capacitor and a second capacitor, said circuit configured such that a ratio of the output of the slew based clock multiplier to the master clock depends on a ratio of said second current source to said first current source and a ratio of said first capacitor to said second capacitor. 5. A slew based clock multiplier which is configured to receive a first clock and a second clock, wherein the first and second clocks are derived from a master clock, said slew based clock multiplier configured to output a fraction of the master clock, said slew based clock multiplier comprising: at least one switch which is configured to close when the first clock is high and is configured to open when the first clock is low; at least one switch which is configured to close when the second clock is high and is configured to open when the second clock is low, said slew based clock multiplier including a first node, a second node, an inverter and a capacitor, said inverter including an input, an output and a trip point, said slew based clock multiplier configured to provide that when said first clock transitions from low to high, a voltage at the first node increases, the input and output of the inverter center at the trip point of the inverter, and the capacitor stores a potential difference between the voltage at the first node and the trip point of the inverter, said slew based clock multiplier configured to provide that when said first clock transitions from high to low, the capacitor stores a voltage at which said inverter is about to trip, said slew based clock multiplier configured to provide that when said second clock transitions from low to high, a voltage at the second node increases and the inverter passes through the trip point of the inverter when the voltage at the second node reaches a predetermined level, and the output of the inverter transitions from high to low, said slew based clock multiplier configured to combine the output of the inverter and the second clock to provide the output of said slew based clock multiplier, said output of said slew based clock multiplier being a fraction of the master clock. 6. A slew based clock multiplier as claimed in claim 5, wherein said slew based clock multiplier is configured to receive a first current source and a second current source, said slew based clock multiplier configured such that a ratio of the output of the slew based clock multiplier to the master clock is the same as a ratio of said second current source to said first current source. 7. A slew based clock multiplier as claimed in claim 5, further comprising a first capacitor and a second capacitor, said slew based clock multiplier configured such that a ratio of the output of the slow based clock multiplier to the master clock is the same as a ratio of said first capacitor to said second capacitor. 8. A slow based clock, multiplier as claimed in claim 5, wherein said slew based clock multiplier is configured to receive a first current source and a second current source, said slow based clock multiplier furt
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