초록 ▼

A temperature sensor has a first FET transistor circuit, whose operating point is located at the temperature-independent point, and a second FET transistor circuit whose operating point is above this point. The voltage difference in this case depends essentially linearly on the temperature. In addit

A temperature sensor has a first FET transistor circuit, whose operating point is located at the temperature-independent point, and a second FET transistor circuit whose operating point is above this point. The voltage difference in this case depends essentially linearly on the temperature. In addition, a circuit for controlling the gain of an amplifier circuit is provided, in which the current through the amplifier circuit at low temperatures is reduced by an appropriate control of the gate voltage of a transistor serving as a current source, so that an amplification which is substantially independent of temperature is carried out.

대표청구항 ▼

1. In combination with an amplifier circuit, a circuit configuration for controlling a gain of the amplifier circuit, comprising: a FET control transistor having a gate and operating as a current source for the amplifier circuit; and a control circuit, connected to said FET control transistor fo

1. In combination with an amplifier circuit, a circuit configuration for controlling a gain of the amplifier circuit, comprising: a FET control transistor having a gate and operating as a current source for the amplifier circuit; and a control circuit, connected to said FET control transistor for controlling a gate voltage of said FET control transistor such that a current through the amplifier circuit is reduced with reduced temperatures of said amplifier circuit so that the gain of the amplifier circuit is substantially temperature-independent, said control circuit including a temperature sensor for registering a temperature of the amplifier circuit and, as a function of the temperature of the amplifier circuit, generating a difference voltage, and said control circuit converting the difference voltage into a control voltage for said gate of said FET control transistor. 2. The circuit configuration according to claim 1, wherein the amplifier circuit has at least one differential amplifier. 3. The circuit configuration according to claim 1, wherein the amplifier circuit has a plurality of differential amplifiers provided as a cascade circuit. 4. The circuit configuration according to claim 3, wherein the gain of the amplifier circuit is based on a transistor transconductance.