초록 ▼

A liquid crystal display device includes a first projection pattern formed of insulating material on a second electrode, and a second vertical alignment film for covering the second electrode and at least the first projection pattern on the second electrode. With this configuration, top end portions

A liquid crystal display device includes a first projection pattern formed of insulating material on a second electrode, and a second vertical alignment film for covering the second electrode and at least the first projection pattern on the second electrode. With this configuration, top end portions of the first projection pattern formed over the light shielding films come into contact with a first substrate. Accordingly, the step of scattering spacers can be omitted, change in the cell thickness can be prevented, and good display quality can be achieved.

대표청구항 ▼

A liquid crystal display device includes a first projection pattern formed of insulating material on a second electrode, and a second vertical alignment film for covering the second electrode and at least the first projection pattern on the second electrode. With this configuration, top end portions

A liquid crystal display device includes a first projection pattern formed of insulating material on a second electrode, and a second vertical alignment film for covering the second electrode and at least the first projection pattern on the second electrode. With this configuration, top end portions of the first projection pattern formed over the light shielding films come into contact with a first substrate. Accordingly, the step of scattering spacers can be omitted, change in the cell thickness can be prevented, and good display quality can be achieved. the least significant bits of the n-bit resolution. 7. The image sensor of claim 1 further comprising a plurality of double ramp analog-to-digital converters, each of said converters being connected to a respective column of said array. 8. The image sensor of claim 1 further comprising a plurality of double ramp analog to digital converters, each of said converters being connected to a respective pixel of said array. 9. An image sensor comprising: an array of pixels organized into a plurality of rows and columns; at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code; and a control circuit for controlling an operation of said double ramp analog-to-digital converter, said control circuit causing said analog-to-digital converter to convert the analog signal using a two step conversion process, wherein during a first step of the conversion process said control circuit sends a gradually decreasing first voltage to said converter until said converter indicates that the first voltage is less than a voltage of the analog signal. 10. The image sensor of claim 9 wherein said control circuit latches a first portion the digital code when said converter indicates that the first voltage is less than the voltage of the analog signal. 11. The image sensor of claim 9 wherein during a second step of the conversion process said control circuit sends a gradually increasing second voltage to said converter until said converter indicates that the second voltage is equal to the voltage of the analog signal. 12. The image sensor of claim 11 wherein said control circuit latches a second portion of the digital code when said converter indicates that the second voltage is equal to the voltage of the analog signal. 13. An image sensor comprising: an array of pixels organized into a plurality of rows and columns, at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code, and a control circuit for controlling an operation of said double ramp analog-to-digital converter, said control circuit causing said analog-to-digital converter to convert the analog signal using a two step conversion process, wherein said control circuit comprises: a counter for generating a digital count; a digital-to-analog converter connected to receive the digital count from said counter, said digital-to-analog converter outputting an analog ramp voltage based on the digital count; and control logic coupled to said counter and said double ramp analog-to-digital converter, wherein during a first step of the conversion process, said control logic causes said counter to generate a gradually decreasing digital count such that the digital-to-analog converter generates a gradually decreasing ramp voltage until said analog-to-digital converter indicates that the gradually decreasing ramp voltage is less than a voltage of the analog signal. 14. The image sensor of claim 13, wherein during a second step of the conversion process, said control logic causes said counter to generate a gradually increasing digital count such that the digital-to-analog converter generates a gradually increasing ramp voltage until said analog-to-digital converter indicates that the gradually increasing ramp voltage is equal to the voltage of the analog signal. 15. An image sensor comprising: an array of pixels organized into a plurality of rows and columns; and at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code, wherein said double ramp analog-to-digital converter comprises: a comparator having a first input connected to receive the analog signal; a first voltage storage means coupled between a second ramp v