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A bridge includes a first port connected to a Primary bus, and second ports respectively connected to second buses. The first port includes a PCI master, a PCI slave and an AGP master. Each of the second ports includes a PCI master, a PCI target and an AGP Target. The bridge further includes a plura

A bridge includes a first port connected to a Primary bus, and second ports respectively connected to second buses. The first port includes a PCI master, a PCI slave and an AGP master. Each of the second ports includes a PCI master, a PCI target and an AGP Target. The bridge further includes a plurality of first-in-first-out memories forming asynchronous data paths between the first port and the second ports and arbitrators for arbitrating a contention between the transactions on the data paths formed by the first-in-first-out memories based on the protocols related to the transactions.

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A bridge includes a first port connected to a Primary bus, and second ports respectively connected to second buses. The first port includes a PCI master, a PCI slave and an AGP master. Each of the second ports includes a PCI master, a PCI target and an AGP Target. The bridge further includes a plura

A bridge includes a first port connected to a Primary bus, and second ports respectively connected to second buses. The first port includes a PCI master, a PCI slave and an AGP master. Each of the second ports includes a PCI master, a PCI target and an AGP Target. The bridge further includes a plurality of first-in-first-out memories forming asynchronous data paths between the first port and the second ports and arbitrators for arbitrating a contention between the transactions on the data paths formed by the first-in-first-out memories based on the protocols related to the transactions. al device; a RESET packet having a DEVICE type for resetting the peripheral device; a RESET packet having LINK and DEVICE types for resetting the peripheral device and the link; a RESET packet having a SEQUENCE BIT type for sequence bit resets; and a HEARTBEAT packet for checking peripheral device presence. 10. A peripheral device having a protocol communication chip as recited in claim 1, wherein the peripheral device is configured to be attached or removed to the serial bus during operation of the host computer and providing functionality without rebooting of the host computer system. 11. A peripheral device having a protocol communication chip as recited in claim 1, wherein the peripheral device is one of a hard disk drive, a floppy disk drive, a tape drive, a CD-ROM drive, and an optical disk drive. 12. A peripheral device having a protocol communication chip as re