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A washing system for high temperature cleaning applications, such as carpet-cleaning, is disclosed that provides a consistent cleaning fluid temperature. The washing system utilizes multiple heat exchangers and multiple heat paths. The heating and power source is provided by a medium duty, diesel cy

A washing system for high temperature cleaning applications, such as carpet-cleaning, is disclosed that provides a consistent cleaning fluid temperature. The washing system utilizes multiple heat exchangers and multiple heat paths. The heating and power source is provided by a medium duty, diesel cycle engine. Multi-stage heating involves heat transfer from the engine's coolant to the cleaning fluid and heat transfer from the exhaust of the engine to the cleaning fluid via an intermediate medium. The system also includes a fluid clutch used to engage a power takeoff from the engine to operate the pump and blower of the washing plant. A failsafe source cutoff diverts the exhaust flow from thermal contact with an intermediate heat transfer oil.

대표청구항 ▼

A washing system for high temperature cleaning applications, such as carpet-cleaning, is disclosed that provides a consistent cleaning fluid temperature. The washing system utilizes multiple heat exchangers and multiple heat paths. The heating and power source is provided by a medium duty, diesel cy

A washing system for high temperature cleaning applications, such as carpet-cleaning, is disclosed that provides a consistent cleaning fluid temperature. The washing system utilizes multiple heat exchangers and multiple heat paths. The heating and power source is provided by a medium duty, diesel cycle engine. Multi-stage heating involves heat transfer from the engine's coolant to the cleaning fluid and heat transfer from the exhaust of the engine to the cleaning fluid via an intermediate medium. The system also includes a fluid clutch used to engage a power takeoff from the engine to operate the pump and blower of the washing plant. A failsafe source cutoff diverts the exhaust flow from thermal contact with an intermediate heat transfer oil. to form the trench; filling the trench with an insulative material in a low temperature process; and performing high temperature oxidation to form the liner in the trench. 18. The method of claim 17, wherein the low temperature process is a tetraethylorthosilicate (TEOS) process. 19. The method of claim 17, wherein the low temperature process is performed at a temperature below 700° C. 20. The method of claim 19, wherein the liner is between approximately 50 and 100 .ANG. thick. hod as recited in claim 15, wherein the step of forming the dielectric layer includes forming the dielectric layer on the semiconductor substrate, which has been heated to a temperature of 300-400° C. 18. The method as recited in claim 13, wherein the step of the first annealing is performed at a temperature of 300-500° C. for 1-5 minutes. 19. The method as recited in claim 13, wherein the second annealing is performed at a temperature of 500-650° C. for 30-60 seconds. the p-type epitaxial layer at a temperature and for a time sufficient to consume all of the exposed portion of the p-type epitaxial layer; and etching the thermally oxidized portion of the p-type epitaxial layer so as to expose a portion of the blocking layer on which the Schottky contact is formed. 3. A method according to claim 2, wherein the step of thermally oxidizing the p-type epitaxial layer is carried out in a dry ambient environment. 4. A method according to claim 2, wherein the step of the thermally oxidizing the p-type epitaxial layer comprises the step of oxidizing the p-type epitaxial layer at a temperature of less than about 1300 ° C. 5. A method according to claim 2, wherein the step of etching the thermally oxidized portion of the p-type epitaxial layer is preceded by the steps of: forming an ohmic metal on a surface of a silicon carbide substrate opposite the blocking layer; and annealing the ohmic metal so as to form an ohmic contact to the silicon carbide substrate. 6. A method according to claim 5, wherein the step of depositing an ohmic metal is preceded by the step of implanting n-type dopants in the substrate so as to form a region of n-type silicon carbide having a carrier concentration higher than a carrier concentration of the substrate; and wherein the step of forming an ohmic metal comprises the step of depositing an ohmic metal on the implanted region of the substrate. 7. A method according to claim 6, wherein the step of implanting n-type dopants is carried out prior to the step of thermally oxidizing the exposed portion of the p-type epitaxial layer such that the step of thermally oxidizing the exposed portion of the p-type epitaxial layer also activates the n-type dopants. 8. A method according to claim 5, wherein the step of etching the thermally oxidized portion of the p-type epitaxial layer is followed by the step of depositing a Schottky metal on the exposed portion of the blocking layer. 9. A method according to claim 2, wherein the step of patterning the oxide layer so as to expose a portion of the p-type epitaxial layer corresponding to the Schottky contact further comprises patterning the oxide layer so as to expose a portion of the p-type epitaxial layer corresponding to the Schottky contact and provide a plurarity of regions of exposed portions of the p-type epitaxial layer; thermally oxidizing the exposed portion of the p-type epitaxial layer including the plurality of regions at a temperature and for a time sufficient to consume all of the exposed portion of the p-type epitaxial layer; and etching the thermally oxidized portion of the p-type epitaxial layer so as to expose a portion of the blocking layer on which the Schottky contact is formed thereby providing a plurality of exposed portions of the blocking layer spaced apart by islands of p-type silicon carbide. 10. A method according to claim 1, wherein the step of patterning the oxide layer so as to expose a portion of the p-type epitaxial layer corresponding to the Schottky contact is preceded by the steps of: patterning the oxide layer and the p-type epitaxial layer to expose a portion of the blocking layer at the periphery of the Schottky rectifier; and implanting n-type dopants in the exposed portion of the n-type blocking layer so as to provide a region of implanted n-type dopants adjacent the periphery of the p-type epitaxial layer. 11. A method according to claim 1, wherein the thickness and doping level of the silicon carbide epitaxial region are selected so as to provide charge in the region of p-type silicon carbide adjacent to a Schottky contact of the Schottky rectifier which is from about 50% to about 100% of where: .di-elect cons.ris a relative dielectric constant of SiC; .di-elect cons.0is a dielectric constant of air; ECis a critical electric field of SiC; and q is an electronic charge. 12. A method according to claim 11, wherein the thickness a nd doping level provide a charge of about 75% of 13. A method of fabricating a silicon carbide Schottky rectifier, the method comprising the steps of: forming a first n-type silicon carbide epitaxial layer on an n-type silicon carbide substrate, wherein the first n-type silicon carbide epitaxial layer has a carrier concentration less than a carrier concentration of the silicon carbide substrate; forming a p-type silicon carbide epitaxial layer on the first n-type epitaxial layer; forming a patterned passivating oxide on the p-type silicon carbide epitaxial layer to expose a portion of the p-type silicon carbide corresponding to a Schottky contact of the Schottky rectifier; thermally oxidizing the exposed portion of the p-type silicon carbide to oxidize the p-type silicon carbide to the first n-type epitaxial layer; then depositing and annealing an ohmic contact metal on the substrate opposite the first n-type epitaxial layer so as to provide an ohmic contact to the substrate; then removing the oxidized p-type silicon carbide to expose a portion of the first n-type epitaxial layer corresponding to the Schottky contact; and forming a Schottky metal on the exposed portion of the first n-type epitaxial layer so as to provide a Schottky contact to the first n-type epitaxial layer. 14. A method according to claim 13, wherein the type silicon carbide epitaxial layer has a thickness and a doping level selected so as to provide a charge in a region of p-type silicon carbide adjacent to the Schottky contact of the Schottky rectifier based on the surface doping of the first n-type epitaxial layer. 15. A method according to claim 13, further composing the step of forming a second layer of n-type silicon carbide, wherein the second layer of n-type silicon carbide is disposed between the silicon carbide substrate and the first n-type epitaxial layer and has a carrier concentration comparable to the carrier concentration the silicon carbide substrate. 16. A method according to claim 13, further comprising the steps of: patterning the p-type epitaxial layer to expose a portion of the first n-type epitaxial layer adjacent the periphery of the Schottky rectifier; implanting n-type dopants in the exposed portion of the first n-type epitaxial layer; thermally annealing the implanted dopants so as to activate the n-type dopants; and wherein the step of depositing a passivating oxide comprises depositing a passivating oxide on the p-type epitaxial layer and the implanted region of the first n-type epitaxial layer. 17. A method according to claim 16, wherein the thermal anneal of the implanted dopants is carried out at a temperature of less than about 1300° C. 18. A method according to claim 16, further comprising the step of implanting n-type dopants in the silicon carbide substrate opposite the first n-type epitaxial layer so as to provide a region of n-type silicon carbide having a carrier concentration comparable to the carrier concentration of the silicon carbide substrate. 19. A method according to claim 10, wherein the step of implanting n-type dopants is followed by the step of depositing an oxide on the implanted region of the silicon carbide substrate; and wherein the step of thermally oxidizing is followed by the step of removing the oxide from the implanted region of the silicon carbide substrate. ity. 14. A method according to claim 13, wherein said light emitting layer is doped with the alkali metal element or the alkaline earth metal element such that the concentration of the alkali metal element or alkaline earth metal element is the highest in the vicinities of the interface between said cathode and said light emitting layer. 15. A method according to claim 13, wherein said cathode is formed of a metal film containing an alkali metal element or an alkaline earth metal element while said anode is formed of a transparent conductive film. 16. A method according to claim 13, wherein said passivation film is formed of an insulating film containing silicon. 17. A method of manufacturing an EL display device, comprising the steps of: forming a TFT over a substrate; forming a cathode that is electrically connected to said TFT; forming a light emitting layer on said cathode; forming an anode on said light emitting layer; forming a passivation film on said anode; and doping said light emitting layer with an alkali metal element or an alkaline earth metal element through said passivation film. 18. A method according to claim 17, wherein said light emitting layer is doped with the alkali metal element or the alkaline earth metal element such that the concentration of the alkali metal element or alkaline earth metal element is the highest in the vicinities of the interface between said cathode and said light emitting layer. 19. A method according to claim 17, wherein said cathode is formed of a metal film containing an alkali metal element or an alkaline earth metal element while said anode is formed of a transparent conductive film. 20. A method according to claim 17, wherein said passivation film is formed of an insulating film containing silicon. 21. A method of manufacturing an EL display device, comprising the steps of: forming a cathode; forming a light emitting layer on said cathode; forming an anode on said light emitting layer; forming a passivation film on said anode; selectively forming a resist on said passivation film; and doping said light emitting layer with an alkali metal element or an alkaline earth metal element through said passivation film using said resist as a mask to dope. 22. A method according to claim 21, wherein said light emitting layer is doped with the alkali metal element or the alkaline earth metal element such that the concentration of the alkali metal element or alkaline earth metal element is the highest in the vicinities of the interface between said cathode and said light emitting layer. 23. A method according to claim 21, wherein said cathode is formed of a metal film containing an alkali metal element or an alkaline earth metal element while said anode is formed of a transparent conductive film. 24. A method according to claim 21, wherein said passivation film is formed of an insulating film containing silicon.