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In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of t

In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of the copper wiring. The wire protective film and/or barrier film is formed with a cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron.

대표청구항 ▼

In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of t

In order to prevent a rise in resistance due to oxidation of copper wiring and diffusion of copper, a semiconductor device is provided which contains a wire protective film 1 covering the top of the copper wiring 2 formed in the insulation film and a barrier film surrounding the side and bottom of the copper wiring. The wire protective film and/or barrier film is formed with a cobalt alloy film containing (1) cobalt, (2) at least one of chromium, molybdenum, tungsten, rhenium, thallium and phosphorus, and (3) boron. t electronic device; a first insulative layer on the passivating layer and in mechanical contact with the passivating layer; a first damascene conductive wire/stud having a lower portion in the first insulative layer and an upper portion above the first insulative layer; a subtractive etch metallic cap on the upper portion of the first damascene conductive wire/stud and in conductive contact with the first damascene conductive wire/stud; a second insulative layer on the first insulative layer, wherein the second insulative layer covers the subtractive etch metallic cap; and a damascene conductive wiring line structure within the second insulative layer such that the damascene conductive wiring line structure is above the subtractive etch metallic cap and is conductively coupled to the subtractive etch metallic cap. 2. The electronic structure of claim 1, wherein the lower portion of the first damascene conductive wire/stud is conductively coupled to a first portion of the first electronic device. 3. The electronic structure of claim 2, further comprising a second damascene conductive wire/stud having a lower portion in the first insulative layer and an upper portion above the first insulative layer, wherein the lower portion of the second damascene conductive wire/stud is conductively coupled to a second portion of the first electronic device, and wherein the subtractive etch metallic cap is in conductive contact with the second damascene conductive wire/stud. 4. The electronic structure of claim 3, wherein the first electronic device is a field effect transistor (FET), wherein the first portion of the first electronic device includes a gate of the FET, and wherein the second portion of the first electronic device is selected from the group consisting of a source of the FET and a drain of the FET. 5. The electronic structure of claim 2, wherein the first electronic device is selected from the group consisting of an MOS capacitor, a resistor, an inductor, a charged coupled device, and a light emitting diode. 6. The electronic structure of claim 2, wherein the substrate layer further comprises a second electronic device, and wherein the electronic structure further comprises: a second damascene conductive wire/stud having a lower portion in the first insulative layer and an upper portion above the first insulative layer, wherein the lower portion of the second damascene conductive wire/stud is conductively coupled to the second electronic device; and a damascene conductive wiring line within the second insulative layer, wherein the damascene conductive wiring line is above the second damascene conductive wire/stud and is insulatively isolated from the second damascene conductive wire/stud. 7. The electronic structure of claim 6, further comprising a second subtractive etch metallic cap on the upper portion of the second damascene conductive wire/stud and in conductive contact with the second damascene conductive wire/stud. 8. The electronic structure of claim 1, wherein the substrate includes a shallow trench isolation (STI), and wherein the lower portion of the first damascene conductive wire/stud is on the STI. 9. The electronic structure of claim 1, further comprising: a second subtractive etch metallic cap on the first insulative layer; and a dual damascene within the second insulative layer such that the dual damascene is above the second subtractive etch metallic cap and is conductively coupled to the second subtractive etch metallic cap. 10. The electronic structure of claim 1, wherein the subtractive etch metallic cap has a thickness between about 50 nm and about 300 nm. 11. The electronic structure of claim 1, wherein the subtractive etch metallic cap includes an electrically conductive material selected from the group consisting of tungsten, tantalum, titanium nitride, aluminum with copper doping, tantalum nitride, tungsten nitride, gold, silver, platinum, copper, palladium, and combinations thereof.