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An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A-2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal

An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A-2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal layer (25). A plating pattern (26) is formed on the wafer (20), exposing portions of the seed metal layer (25) and blocking the rest of the seed metal layer (25). These exposed portions are plated with successive metal layers (27, 28, 29), thereby forming a bonding surface (12) having a number of layered stacks (200) that fill the vias (24). The plating pattern and the nonplated portions of the seed metal layer (25) are then removed.

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1. An integrated circuit device, comprising: a silicon substrate; an active circuit on said substrate, said active circuit having at least one metallization layer thereover; an electrically conductive bonding surface positioned directly over said active circuit and said metallization layer; sai

1. An integrated circuit device, comprising: a silicon substrate; an active circuit on said substrate, said active circuit having at least one metallization layer thereover; an electrically conductive bonding surface positioned directly over said active circuit and said metallization layer; said bonding surface having connector stacks to said metallization layer, each of said stacks being comprised of a stack of the following electrically conductive layers in succession: an electrically conductive seed metal layer in contact with said metallization layer capable of providing an adhesive and conductive layer for electroplating on its surface, an electroplated support layer secured to said seed metal layer, and at least one wire bonding layer on said support layer; and at least one wire bonded to said bonding surface directly over said active circuit. 2. The integrated circuit device of claim 1, wherein said seed metal layer is at least in part comprised of titanium. 3. The integrated circuit device of claim 1, wherein said support layer is comprised at least in part of copper. 4. The integrated circuit device of claim 1, wherein said wire bonding layer is comprised at least in part of nickel. 5. The integrated circuit of claim 1, wherein said wire bonding layer is comprised at least in part of palladium. 6. The integrated circuit device of claim 1, wherein said wire bonding layer is comprised of a first layer of a wire bonding substrate material and a second layer of a sacrificial material. 7. The integrated circuit device of claim 1, wherein said wire bonding layer covers at least a portion of the sides of each said stack. 8. The integrated circuit device of claim 1, wherein said integrated circuit further comprises an electrically non-conductive protective layer over said metallization layer and between said stacks. 9. An integrated circuit device, comprising: a silicon substrate; an active circuit fabricated on said substrate; a metallization layer over said active circuit and coupled to said active circuit; an electrically conductive bonding surface positioned over said active circuit and said metallization layer, said bonding surface having connector stacks to said metallization layer, each of said stacks being comprised of a stack of the following electrically conductive layers in succession: an electrically conductive seed metal layer in contact with said metallization layer capable of providing an adhesive and conductive layer for electroplating on its surface, an electroplated support layer secured to said seed metal layer, and at least one wire bonding layer on said support layer; and at least one wire bonded to said bonding surface. 10. The integrated circuit device of claim 9, wherein said bond pads are directly over said stacks. 11. An integrated circuit device, comprising: a semiconductor substrate: an active circuit disposed on said substrate; a metallization layer over said active circuit and coupled to said active circuit; an electrically conductive bonding surface positioned over said active circuit, said bonding surface having connector stacks to said metallization layer, each of said stacks being comprised of a stack of the following electrically conductive layers in succession: an electrically conductive seed metal layer capable of providing an adhesive and conductive layer for electroplating on its surface in contact with said metallization layer, an electroplated support layer secured to said seed metal layer, and at least one flip chip connection layer on said support layer; and at least one flip chip bump deposited on said flip chip connection layer over said active circuit.