IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0819189
(2001-03-28)
|
발명자
/ 주소 |
|
인용정보 |
피인용 횟수 :
42 인용 특허 :
15 |
초록
▼
The rotating toy in accordance with the present invention includes a hub having an outer portion rotatably connected to an inner portion. At least three rods extending outwardly from the hub to connect to an outer ring. A motor operably connected to a propeller is further disposed on each rob betwee
The rotating toy in accordance with the present invention includes a hub having an outer portion rotatably connected to an inner portion. At least three rods extending outwardly from the hub to connect to an outer ring. A motor operably connected to a propeller is further disposed on each rob between the hub and the outer ring. In addition the rods are positioned such that each is offset by the same predetermined angle. When operating, the propellers spin in a first direction exerting a reaction torque in the opposite direction causing the outer portion to rotate in the opposite direction. The inner portion includes a plurality of legs with vanes that protruded outwardly such that the downward moving air is deflected causing the inner portion not to rotate. A tether attached to a control box and the rotating toy communicates a drive voltage to each motor. The control box further includes a means for determining the orientation of the motors at a specified point of reference thereby permitting a user to change the direction of the rotating toy in reference to person operating the toy.
대표청구항
▼
The rotating toy in accordance with the present invention includes a hub having an outer portion rotatably connected to an inner portion. At least three rods extending outwardly from the hub to connect to an outer ring. A motor operably connected to a propeller is further disposed on each rob betwee
The rotating toy in accordance with the present invention includes a hub having an outer portion rotatably connected to an inner portion. At least three rods extending outwardly from the hub to connect to an outer ring. A motor operably connected to a propeller is further disposed on each rob between the hub and the outer ring. In addition the rods are positioned such that each is offset by the same predetermined angle. When operating, the propellers spin in a first direction exerting a reaction torque in the opposite direction causing the outer portion to rotate in the opposite direction. The inner portion includes a plurality of legs with vanes that protruded outwardly such that the downward moving air is deflected causing the inner portion not to rotate. A tether attached to a control box and the rotating toy communicates a drive voltage to each motor. The control box further includes a means for determining the orientation of the motors at a specified point of reference thereby permitting a user to change the direction of the rotating toy in reference to person operating the toy. uffer for receiving and buffering an external control signal to generate an internal control signal in synchronization with the DLL clock; and an address buffer for receiving and buffering an external address signal to generate an internal address signal in synchronization with the DLL clock. shold and having a second logic level when the temperature-dependent voltage signal indicates that the ambient temperature is equal to or greater than the predetermined threshold. 8. The output buffer circuit of claim 7, wherein the predetermined threshold is programmable after fabrication of the output buffer circuit. 9. An output buffer circuit, comprising: an output driver for providing two control signals representative of a data signal; a first output buffer stage for providing an output signal indicative of the data signal in response to the two output driver control signals; at least one switch responsive to a temperature-dependent control signal, wherein each switch is adapted to pass the two output driver control signals when the temperature-dependent control signal has a first logic value and to pass two complementary control signals when the temperature-dependent control signal has a second logic value; at least one second output buffer stage in parallel with the first output buffer stage, each second output buffer stage coupled to one of the switches in a one-to-one relationship for receiving its output control signals, wherein each second output buffer stage is adapted to provide an output signal indicative of the data signal when the temperature-dependent control signal has the first logic value and to present a high-impedance state when the temperature-dependent control signal has the second logic value. 10. The output buffer circuit of claim 9, further comprising: a comparator having a first input for receiving a reference voltage and a second input for receiving a temperature-dependent voltage signal, wherein the comparator is adapted for generating the temperature-dependent control signal in response to a comparison of the temperature-dependent voltage signal and the reference voltage; and a temperature-dependent voltage generator coupled to the second input for generating the temperature-dependent voltage signal as a function of an ambient temperature. 11. The output buffer circuit of claim 10, wherein the temperature-dependent voltage generator comprises: a first pFET having a source, drain, gate and body, wherein its source and body are coupled to a first node for receiving a second reference voltage and its gate is coupled to its drain; a second pFET having a source, drain, gate and body, wherein its body is coupled to its source and its gate and drain are coupled to a second node for receiving a ground potential; a resistive element coupled between the drain of the first pFET and the source of the second pFET; and an output node coupled between the drain of the first pFET and the second input of the comparator. 12. The output buffer circuit of claim 11, further comprising an amplifier stage coupled between the output node of the temperature-dependent voltage generator and the second input of the comparator. 13. The output buffer circuit of claim 12, wherein the amplifier stage further comprises: a resistive element coupled between the first node of the temperature-dependent voltage generator and the second input of the comparator; and an nFET having a source, a drain and a gate, wherein its drain is coupled to the second input of the comparator, its source is coupled to a third node for receiving the ground potential and its gate is coupled to the output node of the temperature-dependent voltage generator. 14. The output buffer circuit of claim 10, wherein the temperature-dependent voltage generator comprises: an output node coupled to the second input of the comparator; a pFET having a source, drain and gate, wherein its gate and drain are coupled to the output node and its source is coupled to a node for receiving a second reference voltage; and a resistive element coupled between the output node and a node for receiving a ground potential. 15. The output buffer circuit of claim 14, further comprising an amplifier stage coupled between the output node of the tempera ture-dependent voltage generator and the second input of the comparator. 16. The output buffer circuit of claim 10, wherein the temperature-dependent voltage generator comprises: an output node coupled to the second input of the comparator; a resistive element coupled between the output node and a node for receiving a second reference voltage; an nFET having a source, drain and gate, wherein its gate and drain are coupled to the output node and its source is coupled to a node for receiving a ground potential. 17. The output buffer circuit of claim 16, further comprising an amplifier stage coupled between the output node of the temperature-dependent voltage generator and the second input of the comparator. 18. The output buffer circuit of claim 10, wherein the temperature-dependent voltage generator is programmable. 19. The output buffer circuit of claim 18, wherein the temperature-dependent voltage generator comprises a programmable temperature-sensitive element. 20. The output buffer circuit of claim 19, wherein the programmable temperature-sensitive element is a floating-gate FET. 21. The output buffer circuit of claim 10, wherein the temperature-dependent voltage generator comprises: an output node coupled to the second input of the comparator; a resistive element coupled between the output node and a node for receiving a second reference voltage; a first nFET having a source, drain and gate, wherein its drain coupled to the output node; a floating-gate FET having a source, drain, gate and floating gate, wherein its drain is coupled to the source of the first nFET; and a second nFET having a source, drain and gate, wherein its drain is coupled to the source of the floating-gate FET and its source is coupled to a node for receiving a ground potential; wherein the source, drain and gate of the floating-gate FET are coupled to receive programming voltages capable of adding and removing charge from its floating gate; and wherein the gates of the first and second nFETs are coupled to receive control signals for selectively deactivating the first and second nFETs while the programming voltages are applied to the floating-gate FET. 22. The output buffer circuit of claim 14, further comprising an amplifier stage coupled between the output node of the temperature-dependent voltage generator and the second input of the comparator. 23. An output buffer circuit, comprising: an output driver for providing two control signals representative of a data signal; a first output buffer stage for providing an output signal indicative of the data signal in response to the two output driver control signals; at least one switch responsive to a temperature-dependent control signal, wherein each switch is adapted to pass the two output driver control signals when the temperature-dependent control signal has a first logic value and to pass two complementary control signals when the temperature-dependent control signal has a second logic value; at least one second output buffer stage in parallel with the first output buffer stage, each second output buffer stage coupled to one of the switches in a one-to-one relationship for receiving its output control signals, wherein each second output buffer stage is adapted to provide an output signal indicative of the data signal when the temperature-dependent control signal has the first logic value and to present a high-impedance state when the temperature-dependent control signal has the second logic value; a temperature-dependent voltage generator for generating the temperature-dependent voltage signal as a function of an ambient temperature; a comparator having a first input for receiving a reference voltage and a second input for receiving the temperature-dependent voltage signal, wherein the comparator is adapted for generating the temperature-dependent control signal having the first logic level when the temperature-dependent voltage signal is indicative of an ambient temperatur
※ AI-Helper는 부적절한 답변을 할 수 있습니다.