초록 ▼

Digital data is preserved by archiving on a removable medium. In the long term, the save data bit stream must be correctly interpreted. For a computer program or system to be archived, the bit stream constituting the program must be archived and the code must be executable at restore time. The progr

Digital data is preserved by archiving on a removable medium. In the long term, the save data bit stream must be correctly interpreted. For a computer program or system to be archived, the bit stream constituting the program must be archived and the code must be executable at restore time. The program that restores the data does not "see" the contents of the data itself, but accesses it by issuing a function call to an executor. A description of which methods are available to restore the information hidden in the data is always available. A text tells the client which functions are available and what their purposes are. The archiving method is based on using a virtual computer instruction set and saving the algorithm as a program written int hat virtual machine language. For machine instructions to be executed many years later, for example 100 years, an emulator of the original machine would be written on the future hardware. Any machine manufactured in the originating year would develop for each architecture a Universal Virtual Computer (UVC) description of the machine. Each originating instruction would be mapped into a small program of UVC instructions. All manufacturers of new architectures would then have to write a UVC executor which would be able to execute UVC instructions on the machine running 100 years in the future.

대표청구항 ▼

Digital data is preserved by archiving on a removable medium. In the long term, the save data bit stream must be correctly interpreted. For a computer program or system to be archived, the bit stream constituting the program must be archived and the code must be executable at restore time. The progr

Digital data is preserved by archiving on a removable medium. In the long term, the save data bit stream must be correctly interpreted. For a computer program or system to be archived, the bit stream constituting the program must be archived and the code must be executable at restore time. The program that restores the data does not "see" the contents of the data itself, but accesses it by issuing a function call to an executor. A description of which methods are available to restore the information hidden in the data is always available. A text tells the client which functions are available and what their purposes are. The archiving method is based on using a virtual computer instruction set and saving the algorithm as a program written int hat virtual machine language. For machine instructions to be executed many years later, for example 100 years, an emulator of the original machine would be written on the future hardware. Any machine manufactured in the originating year would develop for each architecture a Universal Virtual Computer (UVC) description of the machine. Each originating instruction would be mapped into a small program of UVC instructions. All manufacturers of new architectures would then have to write a UVC executor which would be able to execute UVC instructions on the machine running 100 years in the future. scan chain controller instruction enables the efficiency of the testing procedure to be improved. s a by-pass capacitor comprises coupling a gate electrode of a first transistor to a current electrode of a second transistor; and defining the first location of a second device to perform a logic function, wherein the second device is to use the base logic core. 14. The method of claim 13 wherein defining the first location of a first device to act as a by-pass capacitor further comprises: coupling a current electrode of the first transistor to the power node; and coupling another current electrode of the second transistor to the ground node. 15. A method for implementing by-pass capacitors comprising the steps of: defining a first location of a first device to act as a by-pass capacitor between a first power supply node and a second power supply node, wherein the first device is to be fabricated using a base logic core and the first location is a first logic cell location of the base logic core, wherein the defining the first location of the first device to act as a by-pass capacitor comprises coupling gate electrode of a first transistor to a current electrode of a second transistor; determining that a functional change to the first device is to be implemented; and defining a new metal mask layer, wherein the new metal mask layer is to result in the first location of a second device to perform a logic function implementing the functional change, wherein the second device is to be fabricated using the base logic core. 16. A device for implementing by-pass capacitors comprising: a logic core having a first metal modifiable logic portion and a second modifiable logic portion; a first metal layer coupled to the first metal modifiable logic portion to implement a logic gate; and a second metal layer coupled to the second metal modifiable logic portion to implement a by-pass capacitor between a first voltage reference node and a second voltage reference node; wherein the first metal modifiable logic portion includes: a first transistor having a first signal node coupled to the first voltage reference node, a second signal node, and a control node, and a second transistor having a first signal node coupled to the control node of the first transistor, a second signal node coupled to the second voltage reference node, and a control node coupled to the second signal node of the first transistor. 17. A system for designing integrated circuit devices, the system comprising: a processing module; and memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to: identify an unused logic portion of a device, the unused logic portion being part of a metal definable logic portion of the device; and specify the unused logic portion to be used as a by-pass capacitor between a power node and ground node by coupling a gate electrode of a first transistor to a current electrode of a second transistor. 18. A computer readable medium (storage medium) for storing instructions for use in the design of integrated circuits, the instructions for implementing the steps of: identifying an unused logic portion of a device, the unused logic portion being part of a metal definable logic portion of the device; and specifying the unused logic portion to be used as a by-pass capacitor between a power node and ground node by coupling a gate electrode of a first transistor to a current electrode of a second transistor. tecting unit detects a set of component terminal interconnection information showing a critical net from a component terminal interconnection information list. A conductor detecting unit detects a conductor corresponding to the critical net. A component detecting unit detects two components from the set of component terminal interconnection information. A terminal detecting unit detects a power and/or ground terminal of each of the detected components. A power/ground layer detecting unit detects at least one layer, among power and ground layers, to which the detected power and/or ground terminals are connected. A layer detecting unit specifies a layer, among the detected layers, that is nearest to a signal layer on which the conductor is placed. A prohibition area generating unit generates a via prohibition area on the specified layer. As a result, vias are placed on the specified layer, avoiding the via prohibition area. in the HTML document indicates where the data table or chart has been inserted.