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Graphics processor with pipeline state storage and retrieval 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06T-001/20
출원번호 US-0290414 (2002-11-07)
발명자 / 주소
  • Duluk, Jr., Jerome F.
  • Benkual, Jack
  • Go, Shun Wai
  • Trivedi, Sushma S.
  • Hessel, Richard E.
  • Bratt, Joseph P.
출원인 / 주소
  • Apple Computer, Inc.
대리인 / 주소
    Dorsey & Whitney LLP
인용정보 피인용 횟수 : 51  인용 특허 : 59

초록

A deferred graphics pipeline processor comprised of a mode extraction unit and a Polygon Memory associated with the polygon unit. The mode extraction unit receives a data stream from a geometry unit and separates the data stream into vertices data, and non-vertices data which is sent to the Polygon

대표청구항

A deferred graphics pipeline processor comprised of a mode extraction unit and a Polygon Memory associated with the polygon unit. The mode extraction unit receives a data stream from a geometry unit and separates the data stream into vertices data, and non-vertices data which is sent to the Polygon

이 특허에 인용된 특허 (59)

  1. Brown Patrick Richard ; Minor Barry Lawrence, Accelerated single source 3D lighting mechanism.
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  4. Duluk, Jr., Jerome F.; Hessel, Richard E.; Arnold, Vaughn T.; Benkual, Jack; Cuan, George; Dodgen, Stephen L.; Fang, Emerson S.; Hsu, Hengwei; Trivedi, Sushma S., Apparatus and method for performing setup operations in a 3-D graphics pipeline using unified primitive descriptors.
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  6. Strunk Glenn W., Assembler system and method for a geometry accelerator.
  7. Pai Yet-Ping ; Nguyen Le T., Cache control unit with a cache request transaction-oriented protocol.
  8. Rentschler Eric ; Krech ; Jr. Alan S. ; Tidwell Kendall F, Caching and coherency control of multiple geometry accelerators in a computer graphics system.
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  10. Duluk ; Jr. Jerome F. ; Hessel Richard E. ; Arnold Vaughn T. ; Benkual Jack ; Bratt Joseph P. ; Cuan George ; Dodgen Stephen L. ; Fang Emerson S. ; Gong Zhaoyu ; Ho Thomas Y. ; Hsu Hengwei ; Li Sidon, Deferred shading graphics pipeline processor.
  11. Duluk ; Jr. Jerome F. ; Hessel Richard E. ; Arnold Vaughn T. ; Benkual Jack ; Bratt Joseph P. ; Cuan George ; Dodgen Stephen L. ; Fang Emerson S. ; Gong Zhaoyu ; Ho Thomas Y. ; Hsu Hengwei ; Li Sidon, Deferred shading graphics pipeline processor.
  12. Epstein David A. (Ossining NY) Rossignac Jaroslaw R. (Ossining NY) Wu Jeffrey W. (New York NY), Direct display of CSG expression by use of depth buffers.
  13. Gannett Ethan W., Fragment visibility pretest system and methodology for improved performance of a graphics system.
  14. Jouppi Norman P. ; McCormack Joel J., Full-scene antialiasing using improved supersampling techniques.
  15. Nagashima Ichiro (Kanagawa-ken JPX), Graphics plotting apparatus and method.
  16. Duluk, Jr., Jerome F.; Benkual, Jack; Go, Shun Wai; Trivedi, Sushma S.; Hessel, Richard E.; Bratt, Joseph P., Graphics processor with pipeline state storage and retrieval.
  17. Baldwin David Robert,GBX, Graphics rendering system with reconfigurable pipeline sequence.
  18. Barkans Anthony C. (Billerica MA) Schroeder Brian D. (Lowell MA) Durant Thomas L. (Billerica MA) Gordon Dorothy (Somerville MA) Lach Jorge (Burlington MA), Guardband clipping method and apparatus for 3-D graphics display system.
  19. Morgan ; III David L., High precision texture wrapping method and device.
  20. Coorg Satyan R. ; Teller Seth J., Image drawing system and method with real-time occlusion culling.
  21. Cosman Michael A., Image mapping system and process using panel shear transforms.
  22. Shiraishi Naoto (Toyonaka JPX) Fujii Tatsuya (Nishinomiya JPX), Image processing apparatus.
  23. Shiraishi Naoto (Toyonaka JPX) Fujii Tatsuya (Nishinomiya JPX) Fukushima Masanobu (Toyonaka JPX) Nakajima Tatsuya (Toyonaka JPX) Izawa Yasuhiro (Suita JPX), Image processing system enabling real-time output of image signal based on polygon image information.
  24. Schinnerer James A., Increased performance of graphics memory using page sorting fifos.
  25. Zou Xuelu,JPX ; Hashimoto Kazuaki,JPX, Information recording substrate and information recording medium prepared from the substrate.
  26. Broemmelsiek Raymond M. (9465 Maler Rd. San Diego CA 92129), Interactive display apparatus and method with viewer position compensation.
  27. Lake Robert C. ; Sheehan William E., Lighting control circuit for vehicle brake light/tail light/indicator light assembly.
  28. Snodgrass Thomas D. (Albuquerque NM) Fischer Douglas A. (Albuquerque NM) Graves Jennifer A. (Albuquerque NM) Woods Jordon W. (Albuquerque NM), Memory interface controller.
  29. Obata Koei (Kusatsu JPX) Kai Takashige (Kusatsu JPX), Method and apparatus for applying a shadowing operation to figures to be drawn for displaying on CRT-display.
  30. Rossin Theodore G. ; Krech ; Jr. Alan S., Method and apparatus for clipping non-planar polygons.
  31. Jouppi Norman P. ; McCormack Joel J. ; Chang Chun-Fa, Method and apparatus for compositing colors of images with memory constraints for storing pixel data.
  32. Ross Jay B. (Pennington NJ), Method and apparatus for converting a video image format to a group III fax format.
  33. Grossman Mark Stefan ; Morgan David Lloyd ; Voorhies Douglas Allen, Method and apparatus for culling polygons.
  34. Duluk ; Jr. Jerome F. ; Hessel Richard E. ; Grass Joseph P. ; Rashid Abbas ; Hong Bo ; Mammen Abraham, Method and apparatus for generating texture.
  35. Jerome F. Duluk, Jr. ; Stephen L. Dodgen ; Richard E. Hessel ; Emerson S. Fang ; Hengwei Hsu ; Jason R. Redgrave ; Sushma S. Trivedi, Method and apparatus for performing conservative hidden surface removal in a graphics processor with deferred shading.
  36. Penna David E.,GBX, Method and apparatus for rendering a two dimensional image from three dimensional image data.
  37. Wells Stuart C. (Santa Clara CA) Loo James V. (Los Altos CA) Wallner Dawn M. (San Jose CA), Method and apparatus for rendering anti-aliased polygons.
  38. Toelle Michael A. ; Kenworthy Mark L., Method and apparatus for resolving pixel data in a graphics rendering system.
  39. Duluk ; Jr. Jerome F. (Santa Clara County CA), Method and apparatus for simultaneous parallel query graphics rendering Z-coordinate buffer.
  40. Deering Michael F., Method and apparatus implementing high resolution rendition of Z-buffered primitives.
  41. Griffin Kent E., Method and system for merging pixel fragments in a graphics rendering system.
  42. Kajiya James T. ; Torborg ; Jr. John G. ; Toelle Michael A. ; Griffin Kent E. ; Kenworthy Mark L. ; Snyder John M. ; Elliott Conal M., Method and system for rendering graphical objects to image chunks.
  43. Gossett Carroll Philip ; Goudy Mark ; Bentz Ole, Method for efficient handling of texture cache misses by recirculation.
  44. Peercy Mark Stuart ; Airey John Milligan ; Cabral Brian Keith, Method system and computer program product for shading.
  45. Cabral Brian Keith ; Peercy Mark Stuart ; Airey John Milligan, Method, system, and computer program product for bump mapping in tangent space.
  46. Badique Eric,DEX, Monitoring system.
  47. Sternberg Stanley R. (1606 Hillridge Ann Arbor MI 48103) Dargel William O. (90 W. Joy Rd. Ann Arbor MI 48105) Lougheed Robert M. (1206 Wines Dr. Ann Arbor MI 48103) McCubbrey David L. (125 W. Hoover , Neighborhood transformation logic circuitry for an image analyzer system.
  48. Lee Jeffery H. ; Ando Manabu, Parallel access virtual channel memory system with cacheable channels.
  49. Miyakawa Akira (Yokohama JPX) Hata Seiji (Fujisawa JPX) Nishida Yoshie (Yokohama JPX), Pattern recognition apparatus.
  50. Battle James T., Reconfigurable texture cache.
  51. Erdahl Alan C. (Salt Lake City UT) Robinson John A. (Salt Lake City UT), Rendering global macro texture, for producing a dynamic image, as on computer generated terrain, seen from a moving view.
  52. Greene Edward C. (Palo Alto CA) Kass Michael H. (Palo Alto CA) Miller Gavin S. P. (Palo Alto CA), Rendering of 3D scenes on a display using hierarchical z-buffer visibility.
  53. Olsen Daniel M. ; Scott Noel D. ; Casey Robert J., System and method for accelerated occlusion culling.
  54. Drews Michael D., System and method for improving pixel update performance.
  55. Akeley Kurt Barton ; Gossett Carroll Philip, System and method for merging pixel fragments based on depth range values.
  56. DeAguiar John R. ; Larkin Ross M., System for managing tiled images using multiple resolutions.
  57. Duluk, Jr., Jerome F.; Redgrave, Jason R.; Trivedi, Sushma S.; Hessel, Richard E., System, apparatus and method for spatially sorting image data in a three-dimensional graphics pipeline.
  58. Shiraishi Naoto,JPX, Three dimensional graphics processing apparatus processing ordinary and special objects.
  59. Deering Michael F. (Mountain View CA), Triangle processor for 3-D graphics display system.

이 특허를 인용한 특허 (51)

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  2. Dunaisky, Jonathan; McAllister, David Kirk; Molnar, Steven E.; Kulshrestha, Narayan; Bastos, Rui; Detmer, Joseph; McKnight, William Craig, Alternate reduction ratios and threshold mechanisms for framebuffer compression.
  3. Kalaiah, Aravind; Capin, Tolga, Apparatus, method and a computer program product for providing a unified graphics pipeline for stereoscopic rendering.
  4. Diard, Franck, Compression for co-processing techniques on heterogeneous graphics processing units.
  5. Duluk, Jr., Jerome F.; Hessel, Richard E.; Arnold, Vaughn T.; Benkual, Jack; Bratt, Joseph P.; Cuan, George; Dodgen, Stephen L.; Fang, Emerson S.; Gong, Zhaoyu; Yo, Thomas Y.; Hsu, Hengwei; Li, Sidong; Ng, Sam; Papakipos, Matthew N.; Redgrave, Jason R.; Trivedi, Sushma S.; Tuck, Nathan D.; Go, Shun Wai; Fung, Lindy; Nguyen, Tuan D.; Grass, Joseph P.; Hong, Bo; Mammen, Abraham; Rashid, Abbas; Tsay, Albert Suan-Wei, Deferred shading graphics pipeline processor having advanced features.
  6. Duluk, Jr.,Jerome F.; Hessel,Richard E.; Arnold,Vaughn T.; Benkual,Jack; Bratt,Joseph P.; Cuan,George; Dodgen,Stephen L.; Fang,Emerson S.; Gong,Zhaoyu; Ho,Thomas Y.; Hsu,Hengwei; Li,Sidong; Ng,Sam; P, Deferred shading graphics pipeline processor having advanced features.
  7. Motta, Ricardo; Cabral, Brian; Pieper, Sean; Cunniff, Ross, Deinterleaving interleaved high dynamic range image by using YUV interpolation.
  8. Scotzniovsky, Stefan; Cory, Bruce; Young, Charles Chew-Yuen; Tamasi, Anthony M.; Van Dyke, James M.; Montrym, John S.; Treicher, Sean J., Functional component compensation reconfiguration system and method.
  9. Conroy, David G.; Millet, Timothy J.; Bratt, Joseph P., Hardware-based power management of functional blocks.
  10. Conroy, David G.; Millett, Timothy J.; Bratt, Joseph P., Hardware-based power management of functional blocks.
  11. Zhu, Timothy; Dunn, David; Spurlock, Randy; Spacie, Thomas, Input/output request packet handling techniques by a device specific kernel mode driver.
  12. Van Dyke, James M.; Montrym, John S.; Nagy, Michael B.; Treichler, Sean J., Integrated circuit configuration system and method.
  13. Crow, Franklin C.; Sewall, Jeffrey R., Interrupt handling techniques in the rasterizer of a GPU.
  14. Crow, Franklin C.; Sewall, Jeffrey R., Interrupt handling techniques in the rasterizer of a GPU.
  15. Moreton, Henry Packard; Crow, Franklin C., Line rasterization techniques.
  16. Ku, Ting Sheng; Newcomb, Russell; Wagner, Barry A.; Shaikh, Ashfaq R.; Simms, William B., Loopback configuration for bi-directional interfaces.
  17. Bailey, Robert L.; Howard, Brian D., Method and apparatus for analyzing integrated circuit operations.
  18. Duluk, Jr.,Jerome F.; Hessel,Richard E.; Grass,Joseph P.; Rashid,Abbas; Hong,Bo; Mammen,Abraham, Method and apparatus for generating texture.
  19. Zatz, Harold Robert Feldman; Tannenbaum, David C., Method and apparatus for generation of programmable shader configuration information from state-based control information and program instructions.
  20. Kejriwal, Prabhas; Ho, Chi Fai, Method and apparatus for input rate regulation associated with a packet processing pipeline.
  21. Hotelling, Steve P.; Brenneman, Scott A., Method and apparatus for remotely detecting presence.
  22. Chen, Yi-Peng, Method and related apparatus for image processing.
  23. Molnar, Steven E.; Kirk, David B.; Montrym, John Stephen; Voorhies, Douglas A., Method and system for efficient antialiased rendering.
  24. Tamasi, Anthony Michael; Danskin, John M.; Reed, David G.; Kelleher, Brian M., Method and system for implementing compression across a graphics bus interconnect.
  25. Acocella, Dominic; McDonald, Timothy J.; Gimby, Robert W.; Kong, Thomas H., Method and system for remapping processing elements in a pipeline of a graphics processing unit.
  26. Crow, Franklin C.; Montrym, John S.; McAllister, David K.; Wittenbrink, Craig M., Method and system for rendering connecting antialiased line segments.
  27. Crow, Franklin C., Method and system for rendering polygons with a bounding box in a graphics processor unit.
  28. Steiner, Walter R.; Crow, Franklin C.; Wittenbrink, Craig M.; Allen, Roger L.; Voorhies, Douglas A., Method for parallel fine rasterization in a raster stage of a graphics pipeline.
  29. Diamond, Michael B., Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits.
  30. Crow, Franklin C., Multiple tile output using interface compression in a raster stage.
  31. Garg, Atul; Sharma, Anil, Multistandard hardware video encoder.
  32. Crow, Franklin C.; Legakis, Justin S.; Sewall, Jeffrey R., Nested boustrophedonic patterns for rasterization.
  33. Krah, Christoph H.; Patel, Ronil, Power source switchover apparatus and method.
  34. Kilgard, Mark J.; Everitt, Cass W.; Dodd, Christopher T.; Glanville, Robert Steven, Primitive program compilation for flat attributes with provoking vertex independence.
  35. Dunaisky, Jonathan; Lum, Eric B., Progressive lossy memory compression.
  36. Garg, Atul; Venkatapuram, Prahlad, Rewind-enabled hardware encoder.
  37. Diamond, Michael B., Semiconductor die micro electro-mechanical switch management method.
  38. Diamond, Michael B., Semiconductor die micro electro-mechanical switch management system and method.
  39. Dietrich, Jr., Douglas Sim; Rege, Ashutosh G.; Maughan, Christopher T., Shader program generation system and method.
  40. Kilgard, Mark J.; Everitt, Cass W.; Dodd, Christopher T.; Glanville, Robert Steven, System and method for compiling high-level primitive programs into primitive program micro-code.
  41. Diamond, Michael B.; Montrym, John S.; Van Dyke, James M.; Nagy, Michael B.; Treichler, Sean J., System and method for configuring semiconductor functional circuits.
  42. Lottes, Timothy Paul, System and method for enhanced multi-sample anti-aliasing.
  43. Van Dyke, James M.; Montrym, John S.; Nagy, Michael B.; Treichler, Sean J., System and method for increasing die yield.
  44. Diamond, Michael B.; Montrym, John S.; Van Dyke, James M.; Nagy, Michael B.; Treichler, Sean J., System and method for remotely configuring semiconductor functional circuits.
  45. Diamond, Michael B., System and method for testing and configuring semiconductor functional circuits.
  46. Blanco, Jr.,Richard Lidio, Thermal contact arrangement.
  47. Anderson, Michael Hugh; Chuang, Dan Minglun; Shippee, Geoffrey; Dhawan, Rajat Rajinderkumar; Yu, Chun, Tiled prefetched and cached depth buffer.
  48. Lyon, Benjamin B.; Hotelling, Steve P., Trackpad sensitivity compensation.
  49. Howson, John W., Untransformed display lists in a tile based rendering system.
  50. Howson, John W., Untransformed display lists in a tile based rendering system.
  51. Dunaisky, Jonathan; McAllister, David Kirk; McKnight, William Craig, Variable-width differential memory compression.
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