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Electrical connection with inwardly deformable contacts 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-001/03
  • H05K-001/09
출원번호 US-0779117 (2001-02-08)
발명자 / 주소
  • Distefano, Thomas H.
  • Fjelstad, Joseph
출원인 / 주소
  • Tessera, Inc.
대리인 / 주소
    Lerner, David, Littenberg, Krumholz & Mentlik, LLP
인용정보 피인용 횟수 : 24  인용 특허 : 33

초록

An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining

대표청구항

An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining

이 특허에 인용된 특허 (33)

  1. Dery Ronald A. (Winston-Salem NC) Jones Warren C. (Winston-Salem NC) Lynn William J. (Groveland MA) Rowlette John R. (Clemmons NC), Anisotropically conductive adhesive composition.
  2. Grabbe Dimitry G. (Middletown PA), Area array connector.
  3. Wiley John P. (Vestal NY), Bondable via.
  4. Matsuda Tatsuharu (Kawasaki JPX) Minamizawa Masaharu (Kawasaki JPX), Bump electrode, semiconductor integrated circuit device using the same, multi-chip module having the semiconductor integ.
  5. Patraw Nils E. (Redondo Beach CA), Compressive pedestal for microminiature connections.
  6. Patraw Nils E. (Redondo Beach CA), Compressive pedestal for microminiature connections.
  7. Casciotti, Albert; Deak, Frederick R.; Rowlette, John R., Conductive gel area array connector.
  8. Patraw Nils E. (Redondo Beach CA), Connector system for coupling to an integrated circuit chip.
  9. Kresge John Steven ; Light David Noel ; Wilcox James Robert, Deformable interconnect structure for connecting an internal plane to a through-hole in a multilayer circuit board.
  10. Ehrenberg Scott G. (Fishkill NY) Herron L. Wynn (Hopewell Junction NY) Miersch Ekkehard F. (Schoenaich NY DEX) Park Jae (Somers NY) Poetzinger Janet L. (Pleasant Valley NY), Discrete fabrication of multi-layer thin film, wiring structures.
  11. Zifcak Mark S. (Putnam CT) Kosa Bruce G. (Woodstock CT), Electrical circuit board interconnect.
  12. Evans William R. (Clemons NC) Sinisi David B. (Harrisburg PA), Electrical connector for interconnecting arrays of conductive areas.
  13. Difrancesco Louis (Hayward CA), Electrical interconnect using particle enhanced joining of metal surfaces.
  14. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  15. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA), Electrical socket.
  16. Bindra Perminder S. (South Salem NY) Canfield Dennis A. (Montrose PA) Markovich Voya R. (Endwell NY) McKeveny Jeffrey (Binghamton NY) Ruane Robert E. (Endicott NY) Thomas Edwin L. (Apalachin NY), Encapsulated circuitized power core alignment and lamination.
  17. Dux John B. (Millbrook NY) Poetzinger Janet L. (Pleasant Valley NY) Prestipino Roseanne M. (Beacon NY) Siefering Kevin L. (Cary NC), Fabrication of discrete thin film wiring structures.
  18. Grabbe Dimitry G. (Middletown PA), Field emitter array integrated circuit chip interconnection.
  19. Grabbe Dimitry G. (Middletown PA), High density electrical connector system.
  20. Ciccio Joseph A. (Winchester MA) Thun Rudolf E. (Carlisle MA) Fardy Harry J. (Chelmsford MA), Integrated circuit device package interconnect means.
  21. Patraw Nils E. (Redondo Beach CA), Inverted chip carrier.
  22. Burger Henry A. (Tempe AZ) White Harold E. (Scottsdale AZ), Method of fabricating a multilayer circuit board assembly.
  23. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA) Karavakis Konstantine N. (Cupertino CA) Kovac Zlata (Los Gatos CA) Fjelstad Joseph (Sunnyvale CA), Method of making multilayer circuit.
  24. Fox Leslie R. (Boxborough MA) Wade Paul C. (Shirley MA) Schmidt William L. (Acton MA), Method of packaging and powering integrated circuit chips and the chip assembly formed thereby.
  25. Fjelstad Joseph (Sunnyvale CA) Smith John W. (Palo Alto CA) Distefano Thomas H. (Monte Sereno CA) Zaccardi James (Sunnyvale CA) Walton A. Christian (Belmont CA), Microelectronic contacts with asperities and methods of making same.
  26. Mowatt Larry J. (Allen TX) Walter David (Richardson TX), Multi-chip integrated circuit module.
  27. Walkup William B. (79 Balance Rock Rd. ; Apt. 22 Seymour CT 06483), Multi-chip module connector element and system.
  28. King Michael M. (Vashon WA) Walter Helen J. (Seattle WA), Multi-layer circuit board bonding method utilizing noble metal coated surfaces.
  29. DiStefano Thomas H. (Bronxville NY) Khandros Igor Y. (Peekskill NY) Grube Gary W. (Monroe NY), Multi-layer circuit construction methods with customization features.
  30. Crepeau Philip C. (San Diego CA), Multilayer printed circuit board.
  31. Benarr, Garry M.; Burns, Terry A.; Walker, William J., Pinless connector interposer and method for making the same.
  32. Kurosawa Keiji (Nagano JPX) Yamamoto Kenji (Nagano JPX) Yamashita Mirsuo (Nagano JPX) Mitsui Hisami (Nagano JPX) Miyabara Ayako (Nagano JPX) Miyagawa Kiyotaka (Suzaka JPX) Imura Takayoshi (Nagano JPX, Process for manufacturing hollow multilayer printed wiring board.
  33. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA) Ringler Daniel R. (Elizabethville PA), Surface mount electrical connector.

이 특허를 인용한 특허 (24)

  1. Brown,Dirk D.; Williams,John D.; Radza,Eric M., Connector for making electrical contact at semiconductor scales.
  2. Dittmann,Larry E., Connector having staggered contact architecture for enhanced working range.
  3. Dittmann, Larry E., Contact and method for making same.
  4. Brown,Dirk D.; Williams,John D., Contact grid array formed on a printed circuit board.
  5. Williams,John D., Contact grid array system.
  6. Williams,John David, Contact grid array system.
  7. Dittmann,Larry E., Deep drawn electrical contacts and method for making.
  8. Light, David Noel; Kalakkad, Dinesh Sundararajan; Nguyen, Peter Tho, Electrical connector and method of making it.
  9. Dittmann, Larry E., Electrical connector having a flexible sheet and one or more conductive connectors.
  10. Light, David Noel; Wang, Hung-Ming; Baker, David Rodney; Nguyen, Peter Tho; Pao, Dexter Shih-Wei, Electrical connector with electrical contacts protected by a layer of compressible material and method of making it.
  11. Dittmann,Larry E., Interposer and method for making same.
  12. Dittmann,Larry E., Interposer with compliant pins.
  13. Dittmann,Larry E., Interposer with compliant pins.
  14. Yoshimura, Hideaki, Laminated circuit board and board producing method.
  15. Radza, Eric M.; Williams, John D., Method and system for batch forming spring elements in three dimensions.
  16. Brown, Dirk Dewar; Williams, John David; Long, William B.; Chen, Tingbao, Method and system for batch manufacturing of spring elements.
  17. Dittmann,Larry E., Method for fabricating a connector.
  18. Williams, John D., Method for fabricating a contact grid array.
  19. DiStefano, Thomas H.; Fjelstad, Joseph, Method for making a microelectronic interposer.
  20. Williams, John D., Method of making electrical connector on a flexible carrier.
  21. Williams, John David; Radza, Eric Michael, Spring connector for making electrical contact at semiconductor scales.
  22. Brown, Dirk D.; Williams, John D.; Long, William B., Structure and process for a contact grid array formed in a circuitized substrate.
  23. Dittmann, Larry E.; Williams, John David; Long, William B., System and method for connecting flat flex cable with an integrated circuit, such as a camera module.
  24. Dittmann, Larry E.; Williams, John D.; Long, William B., System for connecting a camera module, or like device, using flat flex cables.
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