초록 ▼

A placement tool that may import and export cell substitution and/or cell selection lists. The cell substitution and/or cell selection lists may be used by the placement tool to substitute and/or modify the placement design database, rather than the original schematic or behavioral database. This ma

A placement tool that may import and export cell substitution and/or cell selection lists. The cell substitution and/or cell selection lists may be used by the placement tool to substitute and/or modify the placement design database, rather than the original schematic or behavioral database. This may eliminate the need to re-synthesize the circuit design during each design iteration. The present invention further contemplates providing a reset feature which may reset the circuit design database to a previous state, if desired.

대표청구항 ▼

A placement tool that may import and export cell substitution and/or cell selection lists. The cell substitution and/or cell selection lists may be used by the placement tool to substitute and/or modify the placement design database, rather than the original schematic or behavioral database. This ma

A placement tool that may import and export cell substitution and/or cell selection lists. The cell substitution and/or cell selection lists may be used by the placement tool to substitute and/or modify the placement design database, rather than the original schematic or behavioral database. This may eliminate the need to re-synthesize the circuit design during each design iteration. The present invention further contemplates providing a reset feature which may reset the circuit design database to a previous state, if desired. h of said comparator inputs that receives a variable data signal is linked to an additional voltage source and termination resistor to help retain signal integrity of said data signals. 6. A measurement device as in claim 5, wherein each common voltage signal applied to an input comparator that receives a respective data signal and a common voltage signal as its two inputs is passed through a load resistor with a selected resistance value that generally matches the resistance value of the termination resistor linked to the variable data signal inputted to the same comparator. 7. A measurement device as in claim 6, wherein each of said comparator inputs that receives a variable data signal is linked to an additional common voltage signal and termination resistor to help retain signal integrity of the variable data signals. 8. A measurement device as in claim 7, wherein each common voltage signal applied to an input comparator that receives a respective data signal and a common voltage signal as its two inputs is passed through a load resistor with a selected resistance value that generally matches the resistance value of the termination resistor linked to the variable data signal inputted to the same comparator. 9. A measurement device as in claim 1, comprising five comparators, four of which receive a respective variable data signal and a respective common voltage signal as their two inputs, and one of which receives two variable data signals as its inputs. 10. A measurement device as in claim 9, wherein said plurality of selection devices comprises multiplexors receiving input signals and control signals, wherein the input signals correspond to the comparator output signals and the control signals correspond to the software selection inputs. 11. A measurement device as in claim 1, further comprising a resistor network between each signal input and said plurality of comparators such that a variable data signal inputted to a selected comparator through said resistor network is isolated from the input impedance of selected comparators in the input circuitry. 12. A measurement device as in claim 1, wherein each of said comparator output signals comprises a differential signal pair corresponding to the actual comparator signal and its inverse. 13. Input circuitry to facilitate the receipt of both single-ended and differential input signals, said input circuitry comprising: at least first, second, and third comparators, wherein each of said comparators is characterized by two input terminals for receiving comparator input signals and one output terminal for providing a comparator output signal; a plurality of multiplexors, wherein each of said multiplexors receives a plurality of multiplexor input signals and a plurality of multiplexor control signals and wherein each of said multiplexors also provides a single multiplexor output signal; wherein a first input signal is selectively connected to one input terminal of said first comparator and also selectively connected to one input terminal of said second comparator; wherein a second input signal is selectively connected to one input terminal of said second comparator and also selectively connected to one input terminal of said third comparator; wherein said multiplexor input signals for each of said plurality of multiplexors comprise a comparator output signal from said first comparator, a comparator output signal from said second comparator, and a comparator output signal from said third comparator; wherein each multiplexor output signal is selected by the respective multiplexor control signals such that either single-ended or differential signals are provided. 14. Input circuitry as in claim 13, wherein said first input signal is connected to said first and second comparators through a resistive network to isolate said first input signal from input impedance of said first and second comparators. 15. Input circuitry as in claim 13, wherein said multiplexor input signals f or each of said plurality of multiplexors further comprise the inverse of the comparator output signal from said first comparator, the inverse of the comparator output signal from said second comparator, and the inverse of the comparator output signal from said third comparator. 16. Input circuitry as in claim 13, further comprising a plurality of common voltage sources wherein each common voltage source provides programmable voltage level, and wherein selected of said plurality of common voltage sources are connected to selected inputs of said first and third comparators. 17. Input circuitry as in claim 16, wherein additionally selected of said common voltage sources are connected in series with respective termination resistors to the respective signal paths of said first and second input signals. 18. Input circuitry as in claim 13 wherein each comparator output signal comprises a differential signal pair. 19. Input circuitry as in claim 13, further comprising fourth and fifth comparators, also each characterized by two input terminals for receiving comparator input signals and one output terminal for providing a comparator output signal, and wherein said first input signal is selectively connected to one input terminal of said fourth comparator and said second input signal is selectively connected to one input terminal of said fifth comparator. 20. Input circuitry as in claim 19, further comprising a plurality of common voltage sources wherein each common voltage source provides a programmable voltage level, and wherein selected of said plurality of common voltage sources are connected to selected inputs of said first, third, fourth, and fifth comparators. 21. Input circuitry as in claim 20, wherein additionally selected of said common voltage sources are connected in series with respective termination resistors to the respective signal paths of said first and second input signals. 22. A time measurement device for obtaining timing information about events in at least one input signal, said time measurement device comprising: at least one measurement channel, each of said measurement channels further comprising an input circuit for receiving said at least one input signal and for outputting a timing signal based on the selected events in the input signal; a plurality of interpolators, wherein each of said interpolators receives a timing signal from a selected input circuit and obtains measurements corresponding to selected transitions within its received timing signal, and whereby each interpolator provides information about such measurements to other components in said time measurement device for recording the measurement information; and wherein each of said measurement channels and corresponding input circuits are capable of transitioning between single-ended and differential measurement modes as directed by control inputs from a user. 23. A time measurement device as in claim 22, wherein each of said input circuits further comprises: two parallel input paths, wherein each of said input paths has a relay therein for allowing or hindering the propagation of said at least one input signal along said input paths; two single-ended comparators and one differential comparator, wherein each of said comparators receives at least one input signal and outputs a timing signal indicative of selected rising and falling edges of said at least one input signal; and at least one selection mechanism connecting all comparator outputs to selected of said interpolators for choosing which timing signal is to be measured by each respective interpolator. 24. A time measurement device as in claim 23, wherein timing signal outputs from each comparator are transmitted through said at least one selection mechanism to selected of said interpolators as a differential signal pair, said differential signal pair comprising a timing signal and its corresponding inverse. 25. A time measurement device as in claim 24, further comprising resist or networks after each of said two parallel input paths and before said comparators such that an input signal to a comparator is more isolated from the input impedance of selected components in said input circuitry. 26. A time measurement device as in claim 23, wherein at least one input terminal of each of said comparators is connected through a resistor to a programmable voltage source. 27. A time measurement device as in claim 26, wherein selected of said pre-defined voltage sources function as threshold voltages during single-ended measurement modes. 28. A selection method for determining whether measurement circuitry is to obtain timing measurements corresponding to single-ended input signals or to differential input signals, said method comprising the following steps: selectively providing at least two input signals to a plurality of comparators, wherein each of said plurality of comparators is characterized by first and second inputs and an output; providing a plurality of programmable voltage sources to each first and second input of said plurality of comparators that are not selectively connected to one of the two input signals; and providing a plurality of selection devices, each for receiving comparator outputs from selected of said plurality of comparators and for receiving user-defined input for determining which of the received comparator outputs will be sent to the measurement circuitry such that timing measurements related to such comparator outputs can be obtained; wherein selected of said plurality of programmable voltage sources are utilized as threshold voltage inputs to selected of said plurality of comparators. 29. A selection method as in claim 28, wherein selected of said plurality of programmable voltage sources are utilized as termination voltage sources for connecting to a plurality of input signals before the input signals are provided to a comparator. 30. A selection method as in claim 29, further comprising the step of routing each of said comparator signals and the respective inverses of each comparator signal to each of said plurality of selection devices.