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Leadless chip carrier with embedded inductor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
출원번호 US-0930747 (2001-08-14)
발명자 / 주소
  • Megahed, Mohamed
  • Hashemi, Hassan S.
출원인 / 주소
  • Skyworks Solutions, Inc.
대리인 / 주소
    Farjami & Farjami LLP
인용정보 피인용 횟수 : 8  인용 특허 : 19

초록

One embodiment comprises a substrate having a top surface for receiving a semiconductor die. According to a disclosed embodiment, an inductor is patterned on the top surface of the substrate. The inductor is easily accessible by connecting its first and second terminals to, respectively, a substrate

대표청구항

One embodiment comprises a substrate having a top surface for receiving a semiconductor die. According to a disclosed embodiment, an inductor is patterned on the top surface of the substrate. The inductor is easily accessible by connecting its first and second terminals to, respectively, a substrate

이 특허에 인용된 특허 (19)

  1. Weber Bernd,DEX ; Hofsaess Dietmar,DEX ; Butschkau Werner,DEX ; Dittrich Thomas,DEX ; Schiefer Peter,DEX, Arrangement including a substrate for power components and a heat sink, and a method for manufacturing the arrangement.
  2. Selna Erich (Mountain View CA), Ball grid array package for a integrated circuit.
  3. Ference Thomas G. ; Howell Wayne J. ; Sprogis Edmund J., Dual chip with heat sink.
  4. Celaya Phillip C. ; Kerr John R., Electronic component assembly having an encapsulation material and method of forming the same.
  5. Yamamoto Toshio,JPX ; Hirachi Yasutake,JPX, Hermetically sealed semiconductor module composed of semiconductor integrated circuit and antenna element.
  6. Palmer Mark J., Integrated circuit package with a plurality of vias that are electrically connected to an internal ground plane and ther.
  7. Gaul Stephen Joseph, Intergrated circuit with coaxial isolation and method.
  8. Hashemi Hassan S., Leadless chip carrier design and structure.
  9. Houghton Christopher Lee ; Brench Colin Edward, Method and system for controlling radio frequency radiation in microelectronic packages using heat dissipation structures.
  10. Beilstein ; Jr. Kenneth Edward ; Bertin Claude Louis ; Cronin John Edward ; Howell Wayne John ; Leas James Marc ; Perlman David Jacob, Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module pack.
  11. Miyagi Takeshi (Fujisawa JPX) Matsumoto Kazuhiro (Yokohama JPX) Sasaki Tomiya (Yokohama JPX) Iwasaki Hideo (Kawasaki JPX) Hisano Katsumi (Yokohama JPX), Multi-layer substrate.
  12. Katchmar Roman (Ottawa CAX), Printed circuit board and heat sink arrangement.
  13. Tseng Tzyy-Jang,TWX ; Cheng David C. H.,TWX ; Lao Shaw-Wen,TWX, Printed circuit board with thermal conductive structure.
  14. Inoue Kazuaki,JPX ; Yamashita Hiroyuki,JPX ; Nakamura Norio,JPX ; Yoda Hiroyuki,JPX, Semiconductor device for heat discharge.
  15. Gaku Morio,JPX ; Ikeguchi Nobuyuki,JPX ; Kobayashi Toshihiko,JPX, Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package.
  16. Gaku Morio,JPX ; Ikeguchi Nobuyuki,JPX ; Kobayashi Toshihiko,JPX, Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package.
  17. Yoshida Yuichi,JPX, Stacked semiconductor device.
  18. Ahn Kie Y. ; Forbes Leonard ; Cloud Eugene H., Structure and method for a high performance electronic packaging assembly.
  19. Kevin Kwong-Tai Chung, Tamper-resistant wireless article including an antenna.

이 특허를 인용한 특허 (8)

  1. Lin, Mou-Shiung, Chip structure with a passive device and method for forming the same.
  2. Meyer,Matthew C.; Chai,Jesse C.; Roosen,Paul H.; Young,Robert T., Circuit board having an overlapping via.
  3. Oggioni, Stefano; Brunschwiler, Thomas; Schlottig, Gerd, Flip-chip electronic device with carrier having heat dissipation elements free of solder mask.
  4. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
  5. Song, Young Kyu; Park, Yunseo; Zhang, Xiaonan; Lane, Ryan David; Hadjichristos, Aristotele, Inductor design on floating UBM balls for wafer level package (WLP).
  6. Hazucha, Peter; Nguyen, Trang T.; Schrom, Gerhard; Paillet, Fabrice; Gardner, Donald S.; Moon, Sung T.; Karnik, Tanay, Integrated inductors.
  7. Hazucha, Peter; Nguyen, Trang T.; Schrom, Gerhard; Paillet, Fabrice; Gardner, Donald S.; Moon, Sung T.; Karnik, Tanay, Integrated inductors.
  8. Graf, Richard Stephen; Lombardi, Thomas Edward; Ray, Sudipta Kumar; West, David Justin, Method of fabricating printed circuit boards.
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