초록 ▼

Impulsive noise is detected for each discrete multi-tone (DMT) symbol. If impulsive noise is detected, all bytes, which belong to the associated DMT symbol are tagged by "erasure bits". After interleaving, Reed-Solomon decoding is initially performed without erasures. If the decoding fails, it is pe

Impulsive noise is detected for each discrete multi-tone (DMT) symbol. If impulsive noise is detected, all bytes, which belong to the associated DMT symbol are tagged by "erasure bits". After interleaving, Reed-Solomon decoding is initially performed without erasures. If the decoding fails, it is performed again, this time with erasures. Reed-Solomon decoders report failure with relatively high certainty, and thus, if the first stage (decoding without erasures) includes failure or errors due to impulsive noise, the second stage of decoding is performed again with erasures.

대표청구항 ▼

Impulsive noise is detected for each discrete multi-tone (DMT) symbol. If impulsive noise is detected, all bytes, which belong to the associated DMT symbol are tagged by "erasure bits". After interleaving, Reed-Solomon decoding is initially performed without erasures. If the decoding fails, it is pe

Impulsive noise is detected for each discrete multi-tone (DMT) symbol. If impulsive noise is detected, all bytes, which belong to the associated DMT symbol are tagged by "erasure bits". After interleaving, Reed-Solomon decoding is initially performed without erasures. If the decoding fails, it is performed again, this time with erasures. Reed-Solomon decoders report failure with relatively high certainty, and thus, if the first stage (decoding without erasures) includes failure or errors due to impulsive noise, the second stage of decoding is performed again with erasures. ng the data output from said RAM module and the data output from said ROM module; an accumulator for accumulating the value output from the multiplier to generate the match value; and, a controller for controlling the action of said signal cross-correlator. 6. The receiver according to claim 1, wherein said detector detects a number of times that the match value exceeds a threshold value within a signal frame. 7. The receiver according to claim 6, wherein said frame type is a collision backoff signal frame when said number of times is 1. 8. The receiver according to claim 6, wherein said frame type is a valid signal frame when said number of times is greater than 1. ate a memory address for fetching the old block of pixels, whereby the motion vector locates the old block of pixels. 4. The method of claim 3 when the pixel data comprises pixels, displaying the pixels for the block. 5. The method of claim 1 wherein the block represents 64 pixels and the macroblock contains four blocks, wherein the error is signaled to conceal the error in the block but not to conceal pixels in other blocks, the method being repeated for other blocks in a frame of macroblocks to detect errors in each of the other blocks, whereby block-level error-detection granularity is provided. 6. The method of claim 1 wherein transforming the coefficients to generate pixel data comprises executing an inverse discrete cosine transform (DCT) on the coefficients to generate the pixel data. 7. The method of claim 6 wherein transforming the coefficients to generate pixel data further comprises multiplying each coefficient by a factor before executing the inverse DCT on the coefficients. 8. The method of claim 6 wherein determining when an error-detection constraint is met comprises: comparing a magnitude of a first constrained coefficient in the coefficients to a magnitude of a second constrained coefficient in the coefficients for the block, whereby constrained coefficients are compared for error detection. 9. The method of claim 8 wherein determining when an error-detection constraint is met further comprises: signaling the error for the block when magnitudes of the first and second constrained coefficient do not match. 10. The method of claim 8 wherein the first and second constrained coefficients are a last and a penultimate non-zero coefficient in the coefficients for the block, whereby at least two non-zero coefficients are constrained. 11. The method of claim 8 wherein determining when an error-detection constraint is met further comprises: determining when a number of the coefficients for the block is below a threshold and determining that the error-detection constraint is met when the number of coefficients is below the threshold, whereby small blocks with few coefficients are not checked for error. 12. The method of claim 1 wherein selecting a first and a second non-zero coefficients from coefficients that are not zero-valued comprises selecting a last of the coefficients that are not zero-valued and selecting a penultimate of the coefficients that are not zero-valued, whereby the last and penultimate non-zero coefficients are constrained for error detection. 13. An error-detecting decoder comprising: a bitstream parser coupled to receive compressed video data and locate a block of pixels within the compressed video data and output compressed block data; a variable-length decoder, receiving the compressed block data and converting variable-length codewords in the compressed block data to block coefficients; a constraint checker, receiving the block coefficients, for selecting at least two coefficients in the block coefficients and signaling an error when the at least two coefficients fail to meet a constraint; an error concealer, activated by an error detected by the constraint checker, for preventing the block coefficients from being used to generate pixels for display when the error is detected; and a coefficient transformer, receiving the block coefficients, for generating block data by inverse transforming the block coefficients, the block data being either pixels for display in the block or error terms for generating pixels for display for the block from stored pixels, whereby errors in the block are detected and concealed when coefficients fail to meet the constraint. 14. The error-detecting decoder of claim 13 further comprising: a multiplier, receiving the block coefficients, for multiplying the block coefficients by a scale factor before the coefficient transformer generates the block data. 15. The error-detecting decoder of claim 13 further comprising: a motion compensator, receiving a motion vector from the bitstream parser, for fetching old pixels from a block in a previous frame and adjusting the old pixels with the error terms to generate the pixels for display, the motion vector for locating the old pixels in the previous frame. 16. The error-detecting decoder of claim 13 wherein the constraint checker signals the error when magnitudes of the at least two coefficients are not equal, whereby the at least two coefficients are constrained by magnitude equality. 17. A compressor for adjusting a video stream for error-detection comprising: discrete cosine transform (DCT) means, receiving blocks of pixels or error terms for blocks of pixels, for discrete-cosine transforming a block of pixels or error terms to generate DCT coefficients; quantize means, receiving the DCT coefficients, for discarding least-significant bits of low-valued DCT coefficients to generate zero-valued DCT coefficients; constraint-adjust means, receiving DCT coefficients, for adjusting values of DCT coefficients to embed error-detection information into adjusted DCT coefficients; and variable-length encode means, receiving the adjusted DCT coefficients, for coding the adjusted DCT coefficients as codewords of varying lengths, the codewords requiring less storage capacity than the DCT coefficients for an average block in the video stream; wherein the constraint-adjust means comprises: select means for selecting at least two coefficients from the DCT coefficients; average means, receiving the at least two coefficients from the select means, for generating an average magnitude from magnitudes of the at least two coefficients; and substitute means for replacing magnitudes of the at least two coefficients with the average magnitude without altering signs of the at least two coefficients, and for not altering other DCT coefficients to generate the adjusted DCT coefficients, whereby magnitudes are averaged and substituted and whereby the video stream is embedded with error-detection information and compressed. 18. The compressor of claim 17 wherein the constraint-adjust means further comprises: count means for counting a number of the DCT coefficients having non-zero values; bypass means for disabling the substitute means from replacing the magnitudes when the count means counts less than a threshold number of non-zero DCT coefficients, whereby blocks with fewer than the threshold number of non-zero DCT coefficients are not altered in magnitude of DCT coefficients, but blocks with more than the threshold number of non-zero coefficients have some magnitudes of DCT coefficients replaced with the average magnitude. her comprising: adjusting the gain of the first gain element at a first update time; detecting a change in the first gain setting value; and if a change is detected, adjusting the gain of the second gain element at the first update time. 10. The method of claim 8, further comprising: generating a gain compensation table based on the first and second gain transfer characteristics, and wherein the determining the linearized gain setting value is performed by retrieving the linearized gain setting value from the gain compensation table corresponding to the adjusted second gain setting value. 11. A method for adjusting signal gain in a transmitter having a first gain element and a second gain element, wherein the first gain element responds to a first update clock and the second gain element responds to a second update clock, wherein the second update clock is faster than the first update clock and the first and second update clocks are asynchronous, the method comprising: receiving a first gain setting value for the first gain element and a second gain setting value for the second gain element; generating a first gain control signal representative of the first gain setting value; generating a second gain control signal representative of the second gain setting value; aligning the first gain control signal with the first update clock; detecting a change in gain setting value of the first gain element; if a change in gain setting value is detected, aligning the second gain control signal with the first update clock; if no change in gain setting value is detected, aligning the second and gain control signal with the second update clock; adjusting a gain of the first gain element with the aligned first gain control signal; and adjusting a gain of the second gain element with the aligned second gain control signal. 12. The method of claim 11, further comprising: adjusting the second gain setting value with a particular gain offset value based on the first gain setting value, and wherein the second gain control signal is representative of the adjusted second gain setting value. 13. A method for providing linear adjustment of output power level from a transmitter, wherein the transmitter includes an element having a plurality of discrete gain settings and an element having a variable gain setting, the method comprising: determining a gain transfer function of the transmitter for each of the plurality of discrete gain settings; for each of the plurality of discrete gain settings, generating a gain compensation table based on the determined gain transfer function; receiving a first gain setting value for the element having a plurality of d