초록 ▼

A method for performing audible fast-forward or reverse of audio content represented in a compressed format, such as, but not limited to, MPEG-1 Layer 3 (MP3) or MPEG-2 Advance Audio Coding (AAC) employs a fast-forward controller which performs fast-forward or reverse by repeatedly skipping forward

A method for performing audible fast-forward or reverse of audio content represented in a compressed format, such as, but not limited to, MPEG-1 Layer 3 (MP3) or MPEG-2 Advance Audio Coding (AAC) employs a fast-forward controller which performs fast-forward or reverse by repeatedly skipping forward or reverse in the compressed audio data stream, retrieving a block of data, and then splicing these data blocks back together. A decoder is then used to decode each of these blocks, to detect when a block switch has occurred (a splice in the data stream), and to quickly resynchronize at each transition. Hierarchical or multiplexed data streams may be decoded using a cascade of decoders each employing this technique. The decoder uses a robust sync search for performing resynchronization and error recovery.

대표청구항 ▼

A method for performing audible fast-forward or reverse of audio content represented in a compressed format, such as, but not limited to, MPEG-1 Layer 3 (MP3) or MPEG-2 Advance Audio Coding (AAC) employs a fast-forward controller which performs fast-forward or reverse by repeatedly skipping forward

A method for performing audible fast-forward or reverse of audio content represented in a compressed format, such as, but not limited to, MPEG-1 Layer 3 (MP3) or MPEG-2 Advance Audio Coding (AAC) employs a fast-forward controller which performs fast-forward or reverse by repeatedly skipping forward or reverse in the compressed audio data stream, retrieving a block of data, and then splicing these data blocks back together. A decoder is then used to decode each of these blocks, to detect when a block switch has occurred (a splice in the data stream), and to quickly resynchronize at each transition. Hierarchical or multiplexed data streams may be decoded using a cascade of decoders each employing this technique. The decoder uses a robust sync search for performing resynchronization and error recovery. ard link, said signal processor being operative for receiving an audio data signal from the remote entity on the return link, said control unit being responsive to the detection of a link impairment occurring on the return link of the data communication channel to alter the at least one operating condition that must be satisfied in order to enable passage from said first operative mode to said second operative-mode. 3. A signal processor as defined in claim 2, wherein the audio data signal is conveying speech sound information. 4. A signal processor as defined in claim 3, wherein the first format is a compressed version of the audio data signal in the second format. 5. A signal processor as defined in claim 4, wherein said signal converter includes a decoder. 6. A signal processor as defined in claim 5, wherein said decoder is a VSELP decoder. 7. A signal processor as defined in claim 4, wherein said control unit includes a link impairment monitor for monitoring audio data signal in the first format on the return link of the data communication channel for the presence of impairments over the return link. 8. A signal processor as defined in claim 7, wherein said control unit includes a link impairment response unit coupled to said link impairment monitor for receiving from said link impairment monitor a data signal conveying link impairment information. 9. A signal processor as defined in claim 8, wherein said link impairment response unit includes a data structure holding data elements representative of operating conditions to be satisfied to enable passage from said first operative mode to said second operative mode, said link impairment response unit being operative to alter at least one of the data elements representative of the operating conditions to be satisfied to enable passage from said first operative mode to said second operative mode in response to reception from said link impairment monitor of a data signal indicative of occurrence of a link impairment. 10. A signal processor as defined in claim 9, wherein at least one of the data elements representative of the operating conditions to be satisfied to enable passage from said first operative mode to said second operative mode is altered such as to tighten a tolerance level with respect to the occurrence of a link impairment on the return link of the data communication channel. 11. A signal processor as defined in claim 10, wherein said link impairment monitor is operative to detect a link impairment on the return link of the data communication channel by detecting data transmission errors on the return link of the data communication channel. 12. A signal processor as defined in claim 11, wherein said link impairment monitor is operative to detect data transmission errors on the return link of the data communication channel by observing parity information contained in the audio data signal in the first format on the return link of the data communication channel. 13. A signal processor as defined in claim 12, wherein said link impairment monitor includes a statistical analysis unit for generating data indicative of information selected in the group consisting of time during which said control unit has stayed in said second operative mode, frequency of occurrence of data transmission errors on the return link of the data communication channel, bit error rate during negotiation for passage from said first operative state to said second operative state, bit error rate while in said second operative state, run-length, energy level during negotiation for passage from said first operative state to said second operative state. 14. A signal processor as defined in claim 13, wherein the data signal conveying link impairment information conveys at least in part to said link impairment response unit the data generated by said statistical analysis unit. 15. A signal processor as defined in claim 14, wherein said control unit when in said second operative mode is responsive to th