초록 ▼

Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of t

Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of the reverse-bias leakage current associated with strain, crystallographic defects or impurities introduced during elevated temperature processing subsequent to gettering can be kept extremely low. An optically transparent, conductive bias electrode layer, serving as both an optical window and an ohmic backside equipotential contact surface for the photodiodes, is fabricated by etching through the polysilicon gettering layer and a portion of the thickness of heavily-doped crystalline silicon layer formed within, and near the back of, the substrate during the gettering process.

대표청구항 ▼

1. A low-leakage current photodiode array comprising: a substrate having a front side and a back side; a plurality of gate regions formed near the front side of the substrate; a backside layer formed within the substrate, near the back side of the substrate, the backside layer having a thick

1. A low-leakage current photodiode array comprising: a substrate having a front side and a back side; a plurality of gate regions formed near the front side of the substrate; a backside layer formed within the substrate, near the back side of the substrate, the backside layer having a thickness of approximately 0.25 to 1.0 micrometers and having a sheet resistivity of approximately 50 to 1000 &OHgr; per square. 2. The photodiode array of claim 1, wherein the backside layer is thinned by etching.3. The photodiode array of claim 1, wherein the backside layer is a crystalline silicon layer.4. The photodiode array of claim 1, wherein the backside layer is formed during a final high-temperature process of forming the photodiode.5. The photodiode array of claim 1, wherein the backside layer is thinned after final high-temperature process of forming the photodiode array.6. The photodiode array of claim 1, further comprising additional layers formed over the back side to decrease the backside reflectivity of the photodiode.