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A reusable container and method for a shipping system includes a container body, a closure, a removable label and a label panel. The label has an area to receive shipping information and a layer of an adhesive material. The label panel has an exposed surface to which the adhesive adheres but from wh

A reusable container and method for a shipping system includes a container body, a closure, a removable label and a label panel. The label has an area to receive shipping information and a layer of an adhesive material. The label panel has an exposed surface to which the adhesive adheres but from which the label may be removed without tearing. A locking structure may be provided. A locking member can engage the locking structure to secure contents during shipment. The container may be a flexible pouch that may include an inner cushioning layer and an outer fabric layer. The pouch may be formed of two panels that have a zippered mouth and a grommet allows a cable tie to lockably secure the zipper in a closed position. A signal transmitter can be included with the container. The system includes special cartons and pallets for a plurality of containers.

대표청구항 ▼

A reusable container and method for a shipping system includes a container body, a closure, a removable label and a label panel. The label has an area to receive shipping information and a layer of an adhesive material. The label panel has an exposed surface to which the adhesive adheres but from wh

A reusable container and method for a shipping system includes a container body, a closure, a removable label and a label panel. The label has an area to receive shipping information and a layer of an adhesive material. The label panel has an exposed surface to which the adhesive adheres but from which the label may be removed without tearing. A locking structure may be provided. A locking member can engage the locking structure to secure contents during shipment. The container may be a flexible pouch that may include an inner cushioning layer and an outer fabric layer. The pouch may be formed of two panels that have a zippered mouth and a grommet allows a cable tie to lockably secure the zipper in a closed position. A signal transmitter can be included with the container. The system includes special cartons and pallets for a plurality of containers. age at a first node when a supply current is provided to said first node; a current source generating a current; and a current mirror coupling said current to said first node of said shunt regulator as said supply current of said shunt regulator; wherein when said shunt regulator is powering up, said current has an increasing magnitude when a voltage at said first node is less than a predefined voltage value, said predefined voltage value being less than said reference voltage; and said current has a decreasing magnitude when said voltage at said first node is greater than said predefined voltage value. 2. The circuit of claim 1, wherein said shunt regulator comprises a bandgap reference circuit and said reference voltage comprises a bandgap voltage.3. The circuit of claim 1, wherein said predefined voltage value is about 80% of said reference voltage.4. The circuit of claim 2, wherein said predefined voltage value is 1 volt.5. The circuit of claim 1, wherein said current source comprises: a first resistor coupled between said first node and a second node; a second resistor coupled between said second node and a third node; a first transistor having a first current handling terminal coupled to said third node, a second current handling terminal coupled to a first supply voltage, and a control terminal coupled to said second node; and a second transistor having a first current handling terminal generating said current, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said third node. 6. The circuit of claim 5, wherein said current mirror comprises: a third transistor having a first current handling terminal and a control terminal both coupled to said first current handling terminal of said second transistor, and a second current handling terminal coupled to a second supply voltage; and a fourth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to said second supply voltage, and a control terminal coupled to said control terminal of said third transistor. 7. The circuit of claim 6, wherein said first and second transistors comprise bipolar transistors and said third and fourth transistors comprise MOS transistors.8. The circuit of claim 7, wherein said first and second transistors comprise NPN bipolar transistors, and said third and fourth transistors comprise PMOS transistors.9. The circuit of claim 8, wherein said first supply voltage comprises a ground potential and said second supply voltage comprises a Vcc power supply potential.10. The circuit of claim 5, wherein said current has a peak current value equal to VT/R2, where VTis the thermal voltage (kT/q) and R2 is the resistance of said second resistor, and said predefined voltage value is the sum of a voltage at said second node and a voltage across said first resistor at said peak current value.11. The circuit of claim 2, wherein said bandgap reference circuit comprises: a first resistor and a second resistor connected in series between said first node and a second node; a first transistor having a first current handling terminal and a control terminal both coupled to said second node, and a second current handling terminal coupled to a first supply voltage, said first transistor generating a base-to-emitter voltage at said second node; and a differential amplifier comprising a second transistor and a third transistor, said second and third transistors having unequal current densities and generating a &Dgr;V BEvoltage across said second resistor; wherein said base-to-emitter voltage at said second node is summed with a multiple of said &Dgr;V BEvoltage to generate said bandgap voltage.12. The circuit of claim 11, wherein said differential amplifier further comprises a current mirror coupled between said first node and said second and third transistors and a fourth transistor coupled to said second and third transistors providing a bias current.13. The circuit of claim 11, wherein said differential amplifier comprises: said second transistor having a first current handling terminal coupled to a third node, a second current handling terminal coupled to a fourth node, and a control terminal coupled to an intermediate node between said first and second resistors; said third transistor having a first current handling terminal coupled to a fifth node, a second current handling terminal coupled to said fourth node, and a control terminal coupled to said second node; a fourth transistor having a first current handling terminal coupled to said fourth node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said control terminal of said first transistor; a fifth transistor having a first current handling terminal coupled to said fifth node, a second current handling terminal coupled to said first node, and a control terminal coupled to said third node; and a sixth transistor having a first current handling terminal and a control terminal both coupled to said third node, and a second current handling terminal coupled to said first node. 14. The circuit of claim 11, wherein said differential amplifier comprises: said second transistor having a first current handling terminal coupled to a third node, a second current handling terminal coupled to a fourth node, and a control terminal coupled to an intermediate node between said first and second resistors; said third transistor having a first current handling terminal coupled to a fifth node, a second current handling terminal coupled to said fourth node, and a control terminal coupled to said second node; a resistor coupled between said fourth node and said first supply voltage; a fourth transistor having a first current handling terminal coupled to said fifth node, a second current handling terminal coupled to said first node, and a control terminal coupled to said third node; and a fifth transistor having a first current handling terminal and a control terminal both coupled to said third node, and a second current handling terminal coupled to said first node. 15. The circuit of claim 11, further comprising: a fourth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to a sixth node, and a control terminal coupled to an output terminal of said differential amplifier; and a fifth transistor having a first current handling terminal coupled to said sixth node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said control terminal of said first transistor. 16. The circuit of claim 11, further comprising: a fourth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to a sixth node, and a control terminal coupled to an output terminal of said differential amplifier; and a fifth transistor having a first current handling terminal coupled to said sixth node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said current source and driven by a portion of said current. 17. The circuit of claim 15, further comprising: a sixth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said sixth node. 18. The circuit of claim 16, further comprising: a sixth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said sixth node. 19. A circuit comprising: a shunt regulator comprising a bandgap reference circuit generating a bandgap voltage at a first node; a current source generating a current, sa