An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern dispos
An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern disposed on a transparent or translucent cover connects bond pads on the light receiving surface of the semiconductor die to external electrical contacts. The construction of the package reduces connection length and eliminates the air gap between the glass and the die. In another package, a substrate having a protruding wall supports the glass and the substrate provides an electrical connection to terminals for connection to an external device. In another package, the glass is supported by a die mounting board that supports the semiconductor die and includes leads for connection to an external device. In other packages, the glass is supported directly by the semiconductor die and the die is supported by an encapsulated assembly including leads that support the semiconductor die.
대표청구항▼
An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern dispos
An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern disposed on a transparent or translucent cover connects bond pads on the light receiving surface of the semiconductor die to external electrical contacts. The construction of the package reduces connection length and eliminates the air gap between the glass and the die. In another package, a substrate having a protruding wall supports the glass and the substrate provides an electrical connection to terminals for connection to an external device. In another package, the glass is supported by a die mounting board that supports the semiconductor die and includes leads for connection to an external device. In other packages, the glass is supported directly by the semiconductor die and the die is supported by an encapsulated assembly including leads that support the semiconductor die. east one metal selected from the group consisting of nickel, cobalt, iron, and an alloy thereof.12. The field-effect transistor according to claim 1, wherein said gate region contains at least one material selected from the group consisting of aluminum, titanium, tungsten, gold, silver, and an alloy thereof.13. The field-effect transistor according to claim 1, wherein said drain region contains at least one material selected from the group consisting of nickel, cobalt, and an alloy thereof.14. A circuit configuration comprising at least one field-effect transistor according to claim 1.15. A method of fabricating a field-effect transistor, which comprises: forming a source layer on a substrate; forming an electrically conductive gate layer is on the source layer; forming at least one through hole in the gate layer; introducing at least one nanoelement into the through hole, the nanoelement being electrically coupled to the source layer and arranged and configured such that a conductivity thereof is controllable via the gate region, so that the nanoelement forms a channel region; and applying a drain layer on the gate layer and electrically coupling the drain layer to the nanoelement. 16. The method according to claim 15, wherein the step of forming the through hole comprises dry etching.
연구과제 타임라인
LOADING...
LOADING...
LOADING...
LOADING...
LOADING...
이 특허에 인용된 특허 (10)
Takata Hirofumi,JPX ; Tanida Tadashi,JPX, Electronic component, method for making the same, and lead frame and mold assembly for use therein.
Michael G. Kelly ; James-Yu Chang ; Gary Dean Sasser ; Andrew Arthur Hunter GB; Cheng-Cheng Chang, Integrated circuit packaging for optical sensor devices.
Fusaro James M. ; Darveaux Robert F. ; Rodriguez Pablo, Methods of making thin integrated circuit device packages with improved thermal performance and substrates for making the packages.
Wang, Wei Lun; Chin, Yi-Min; Lu, Mei-Ju; Zhang, Jia-Hao, Optical fiber structure, optical communication apparatus and manufacturing process for manufacturing the same.
Wang, Meng-Jen, Semiconductor element having conductive vias and semiconductor package having a semiconductor element with conductive vias and method for making the same.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.