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Optical device packages having improved conductor efficiency, optical coupling and thermal transfer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-031/0232
  • H01L-023/02
  • H01L-021/00
출원번호 US-0046995 (2002-01-14)
우선권정보 KR-0002161 (2001-01-15); KR-0002162 (2001-01-15); KR-0006823 (2001-02-12); KR-0017451 (2001-04-02)
발명자 / 주소
  • Paek, Jong Sik
출원인 / 주소
  • Amkor Technology, Inc.
대리인 / 주소
    Weiss, Moy & Harris, P.C.
인용정보 피인용 횟수 : 28  인용 특허 : 10

초록

An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern dispos

대표청구항

An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern dispos

이 특허에 인용된 특허 (10)

  1. Takata Hirofumi,JPX ; Tanida Tadashi,JPX, Electronic component, method for making the same, and lead frame and mold assembly for use therein.
  2. Thomas P. Glenn ; Steven Webster ; Roy Dale Hollaway, Flip chip on glass image sensor package fabrication method.
  3. Michael G. Kelly ; James-Yu Chang ; Gary Dean Sasser ; Andrew Arthur Hunter GB; Cheng-Cheng Chang, Integrated circuit packaging for optical sensor devices.
  4. Glenn Thomas P. ; Hollaway Roy D.,PAX ; Panczak Anthony E., Method of making an integrated circuit package.
  5. Fusaro James M. ; Darveaux Robert F. ; Rodriguez Pablo, Methods of making thin integrated circuit device packages with improved thermal performance and substrates for making the packages.
  6. Glenn Thomas P., Mounting for a semiconductor integrated circuit device.
  7. Glenn Thomas P., Mounting having an aperture cover with adhesive locking feature for flip chip optical integrated circuit device.
  8. Woodworth Arthur,GBX ; Pearson George,GBX ; Ewer Peter Richard,GBX, Plural semiconductor die housed in common package with split heat sink.
  9. Choi Yoon Hwa,KRX ; Lee Nam Soo,KRX, Stack package.
  10. Aono Tsutomu (Gunma-ken JPX) Nishi Takayoshi (Gunma-ken JPX), Surface-mount flat package semiconductor device.

이 특허를 인용한 특허 (28)

  1. Hsiao, Wei-Min, Carrier bonding and detaching processes for a semiconductor wafer.
  2. Yang, Kuo-Pin; Hsiao, Wei-Min; Hung, Cheng-Hui, Carrier bonding and detaching processes for a semiconductor wafer.
  3. Onishi,Hiroaki; Fujimoto,Hisayoshi, Image sensor module with substrate and frame and method of making the same.
  4. Hua, Pei Hsing; Chang, Hui-Shan, Method for dicing a semiconductor wafer having through silicon vias and resultant structures.
  5. Haskett, Bradley Morgan; O'Connor, John Patrick; Miller, Mark Myron; Crowley, Sean Timothy; Miks, Jeffrey Alan; Popovich, Mark Phillip, Micro-optical device packaging system.
  6. Chen, Kuo-Hua, Neural sensing device and method for making the same.
  7. Chen, Kuo-Hua; Chang, Chih-Wei; Chiou, Jin-Chern, Neural sensing device and method for making the same.
  8. Wang, Wei Lun; Chin, Yi-Min; Lu, Mei-Ju; Zhang, Jia-Hao, Optical fiber structure, optical communication apparatus and manufacturing process for manufacturing the same.
  9. Shen, Chi-Chih; Chen, Jen-Chuan; Pan, Tommy; Chang, Hui-Shan; Hung, Chia-Lin, Package structure and package process.
  10. Hsu, Chih-Jing; Ou, Ying-Te; Fu, Chieh-Chen; Huang, Che-Hau, Semiconductor device and method for manufacturing the same.
  11. Chen, Yung-Jen; Ding, Yi-Chuan; Huang, Min-Lung, Semiconductor device having conductive via and manufacturing process.
  12. Chen, Yung-Jen; Ding, Yi-Chuan; Huang, Min-Lung, Semiconductor device having conductive via and manufacturing process for same.
  13. Chen, Kuo Hua; Tsai, Li Wen, Semiconductor device having conductive vias and semiconductor package having semiconductor device.
  14. Cheng, Hung-Hsiang; Lin, Tzu-Chih; Hung, Chang-Ying; Wu, Chih-Wei, Semiconductor device having shielded conductive vias.
  15. Chin, Yi-Min; Chang, Yung-Shun; Lu, Mei-Ju; Zhang, Jia-Hao; Hung, Wen-Chi, Semiconductor device packages.
  16. Huang, Che-Hau; Ou, Ying-Te, Semiconductor device with conductive vias.
  17. Shizuno, Yoshinori, Semiconductor device with simplified constitution.
  18. Wang, Meng-Jen, Semiconductor element having conductive vias and semiconductor package having a semiconductor element with conductive vias and method for making the same.
  19. Yen, Han-Chee; Chen, Shih-Yuan; Lai, Chien-Pai; Cheng, Ming-Hsien, Semiconductor package having a waveguide antenna and manufacturing method thereof.
  20. Lin, I-Chia; Jou, Sheng-Jian; Yen, Han-Chee, Semiconductor package having an antenna and manufacturing method thereof.
  21. Liao, Kuo-Hsien; Chan, Chi-Hong; Fuyu, Shih, Semiconductor package integrated with conformal shield and antenna.
  22. Yen, Han-Chee; Chung, Chi-Sheng; Liao, Kuo-Hsien; Yeh, Yung-I, Semiconductor package integrated with conformal shield and antenna.
  23. Hung, Chia-Lin; Chen, Jen-Chuan; Chang, Hui-Shan; Yang, Kuo-Pin, Semiconductor package with through silicon vias and method for making the same.
  24. Wang, Meng-Jen, Semiconductor structure having conductive vias and method for manufacturing the same.
  25. Chen, Chien-Hua; Lee, Teck-Chong; Shih, Hsu-Chiang; Hsieh, Meng-Wei, Semiconductor structure with passive element network and manufacturing method thereof.
  26. Wang, Yung-Hui, Semiconductor wafer, semiconductor process and semiconductor package.
  27. Wang, Chen-Chao; Ou, Ying-Te, Through silicon vias for semiconductor devices and manufacturing method thereof.
  28. Wang, Chen-Chao; Ou, Ying-Te, Through silicon vias for semiconductor devices and manufacturing method thereof.
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