초록

The invention provides a low temperature process for depositing silicon nitride or silicon dioxide dielectric films over magnetically active materials in the manufacture of MRAM devices and MRAM devices produced by the method.

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1. A magnetoresistive random access memory device with improved magnetic properties produced by a process comprising the steps of:(a) forming an initial dielectric layer overlying a semiconductor substrate;(b) planarizing the initial dielectric layer;(c) depositing one or more layers of magnetoresis

1. A magnetoresistive random access memory device with improved magnetic properties produced by a process comprising the steps of:(a) forming an initial dielectric layer overlying a semiconductor substrate;(b) planarizing the initial dielectric layer;(c) depositing one or more layers of magnetoresistive storage material on the initial dielectric layer at a temperature of 300° C. or less;(d) forming an electrically-conductive stop layer overlying the magnetoresistive storage material layer;(e) forming a hardmask layer overlying the stop layer, wherein the stop layer and the hardmask layer are deposited at a temperature of about 100° C. to 300° C.;(f) etching the stop layer and hardmask layer;(g) patterning the magnetoresistive storage material;(h) forming a dielectric layer overlying the magnetoresistive storage material, wherein the dielectric layer comprises silicon nitride deposited at a temperature of about 200° C. to 300° C.;(i) forming an electrically-conductive metal layer overlying the dielectric layer;(j) patterning the metal layer;(k) forming a passivation dielectric layer overlying exposed deposited layers, wherein the dielectric layer comprises silicon nitride deposited at a temperature of about 200° C. to 300° C.; and(l) annealing the device in a magnetic field to align magnetic moments, wherein the annealing takes place at a temperature of about 200° C. to 300° C. 2. The memory device of claim 1, wherein the initial dielectric layer is selected from the group consisting of silicon nitride and silicon dioxide. 3. The memory device of claim 2, wherein the initial dielectric layer is silicon dioxide. 4. The memory device of claim 1, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of 200° C. or less. 5. The memory device of claim 1, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of 100° C. or less. 6. The memory device of claim 1, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of about 50° C. 7. The memory device of claim 1, wherein the hardmask layer is selected from the group consisting of silicon nitride and silicon dioxide. 8. The memory device of claim 7, wherein the hardmask layer comprises silicon dioxide. 9. The memory device of claim 1, wherein the hardmask layer is deposited by PECVD. 10. The memory device of claim 1, wherein the hardmask layer is deposited at a temperature of about 150° C. to about 250° C. 11. The memory device of claim 1, wherein the hardmask layer is deposited at a temperature of about 200° C. 12. The memory device of claim 1, wherein the dielectric layers are deposited by PECVD. 13. The memory device of claim 12, wherein the dielectric layers are deposited at a temperature individually selected from about 225° C. to about 295° C. 14. The memory device of claim 13, wherein the dielectric layers are deposited at a temperature of 295° C. 15. The memory device of claim 13, wherein the dielectric layers are deposited at a temperature individually selected from about 250° C. to about 290° C. 16. The memory device of claim 1, wherein the silicon nitride dielectric layers comprise about 35% to about 40% by volume of Si, about 35% to about 45% by volume of N, and about 15% to about 30% by volume of H. 17. The memory device of claim 1, wherein the improved magnetic properties are selected from the group consisting of a higher GMR signal, more uniform write/read thresholds, a higher percentage of functional memory bits, and combinations thereof. 18. A method of manufacturing a magnetoresistive random access memory device having improved magnetic properties, comprising the steps of:(a) forming an initial dielectric layer overlying a semiconductor substrate;(b) planarizing the initial dielectric layer;(c) depositing one or more layers of magnetoresistive storage material on the initial dielectric layer at a temperature of 300° C. or less;(d) forming an electrically-conductive stop layer overlying the magnetoresistive storage material layer;(e) forming a hardmask layer overlying the stop layer, wherein the stop layer and the hardmask layer are deposited at a temperature of about 100° C. to 300° C.;(f) etching the stop layer and hardmask layer;(g) patterning the magnetoresistive storage material;(h) forming a dielectric layer overlying the magnetoresistive storage material, wherein the dielectric layer comprises silicon nitride deposited at a temperature of about 200° C. to 300° C.;(i) forming an electrically-conductive metal layer overlying the dielectric layer;(j) patterning the metal layer;(k) forming a passivation dielectric layer overlying exposed deposited layers, wherein the dielectric layer comprises silicon nitride deposited at a temperature of about 200° C. to 300° C.; and(l) annealing the device in a magnetic field to align magnetic moments, wherein the annealing takes place at a temperature of about 200° C. to 300° C. 19. The method of claim 18, wherein the initial dielectric layer is selected from the group consisting of silicon nitride and silicon dioxide. 20. The method of claim 19, wherein the initial dielectric layer is silicon dioxide. 21. The method of claim 18, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of 200° C. or less. 22. The method of claim 18, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of 100° C. or less. 23. The method of claim 18, wherein the magnetoresistive storage material is deposited on the initial dielectric layer at a temperature of about 50° C. 24. The method of claim 18, wherein the hardmask layer is selected from the group consisting of silicon nitride and silicon dioxide. 25. The method of claim 24, wherein the hardmask layer comprises silicon dioxide. 26. The method of claim 18, wherein the hardmask layer is deposited by PECVD. 27. The method of claim 18, wherein the hardmask layer is deposited at a temperature of about 150° C. to about 250° C. 28. The method of claim 18, wherein the hardmask layer is deposited at a temperature of about 200° C. 29. The method of claim 18, wherein the dielectric layers are deposited by PECVD. 30. The method of claim 18, wherein the dielectric layers are deposited at a temperature individually selected from about 225° C. to about 295° C. 31. The method of claim 30, wherein the dielectric layers are deposited at a temperature of 295° C. 32. The method of claim 30, wherein the dielectric layers are deposited at a temperature individually selected from about 250° C. to about 290° C. 33. The method of claim 18, wherein the silicon nitride dielectric layers comprise about 35% to about 40% by volume of Si, about 35% to about 45% by volume of N, and about 15% to about 30% by volume of H. 34. The method of claim 18, wherein the improved magnetic properties are selected from the group consisting of a higher GMR signal, more uniform write/read thresholds, a higher percentage of functional memory bits, and combinations thereof.