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Semiconductor substrate and its production method, semiconductor device comprising the same and its production method 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-027/01
  • H01L-027/12
  • H01L-031/0392
출원번호 US-0787877 (1999-09-24)
우선권정보 JP-0272126 (1998-09-25)
국제출원번호 PCT/JP99/05231 (1999-09-24)
국제공개번호 WO00/19500 (2000-04-06)
발명자 / 주소
  • Morishita, Takashi
  • Matsui, Masahiro
출원인 / 주소
  • Asahi Kasei Kabushiki Kaisha
대리인 / 주소
    Birch, Stewart, Kolasch & Birch, LLP
인용정보 피인용 횟수 : 37  인용 특허 : 10

초록

When a SOI substrate is produced a first silicon layer epitaxially grown on the insulating underlay is ion implanted to make deep part of interface of the silicon layer amorphous, and then annealed to recrystallize. Next, the silicon layer is heat treated to oxidize part of the surface side, and aft

대표청구항

1. A semiconductor substrate comprising an insulating underlay and a crystalline silicon layer epitaxially grown thereon, said insulating underlay comprising a single crystal oxide substrate or a substrate comprising a silicon substrate and a crystalline oxide layer or fluoride layer stacked thereon

이 특허에 인용된 특허 (10)

  1. Ono Katsuyasu (Fujisawa JPX), Adjustable seat belt anchorage.
  2. Ohori Tatsuya (Kawasaki JPX) Hanyu Isamu (Kawasaki JPX) Sugimoto Fumitoshi (Kawasaki JPX) Arimoto Yoshihiro (Kawasaki JPX), Composite semiconductor substrate having a single crystal substrate and a single crystal layer formed thereon.
  3. Miwa Hiroyuki (Kanagawa JPX) Gomi Takayuki (Kanagawa JPX) Kato Katsuyuki (Kanagawa JPX), Method and apparatus for SOI transistor.
  4. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX, Method for preparing semiconductor member.
  5. Lau Silvanus S. (Pasadena CA) Mayer James W. (Pasadena CA) Sigmon Thomas W. (Corvallis OR), Method for producing a low defect layer of silicon-on-sapphire wafer.
  6. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Method for producing semiconductor substrate.
  7. Moriyasu, Yoshitaka; Morishita, Takashi; Matsui, Masahiro; Ishida, Makoto, SOI substrate and process for preparing the same, and semiconductor device and process for preparing the same.
  8. Warashina Suguru,JPX ; Tsuboi Osamu,JPX, Semiconductor device and method of manufacturing semiconductor device.
  9. Yamauchi, Shoichi; Ohshima, Hisayoshi; Matsui, Masaki; Onoda, Kunihiro; Ooka, Tadao; Yamanaka, Akitoshi; Izumi, Toshifumi, Semiconductor substrate and method of manufacturing the same.
  10. Kobayashi Kenya,JPX ; Hamajima Tomohiro,JPX ; Okonogi Kensuke,JPX, Silicon on insulating substrate.

이 특허를 인용한 특허 (37)

  1. Ahn, Kie Y.; Forbes, Leonard, Apparatus having a lanthanum-metal oxide semiconductor device.
  2. Ahn,Kie Y.; Forbes,Leonard, Atomic layer deposited ZrTiOfilms.
  3. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
  4. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
  5. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer.
  6. Hârle, Volker; Strauss, Uwe; Brüderl, Georg; Eichler, Christoph; Avramescu, Adrian, Composite substrate, and method for the production of a composite substrate.
  7. Ahn,Kie Y.; Forbes,Leonard, Crystalline or amorphous medium-K gate oxides, Y0and Gd0.
  8. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  9. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  10. Ahn,Kie Y.; Forbes,Leonard, Electronic apparatus with deposited dielectric layers.
  11. Ahn, Kie Y.; Forbes, Leonard, High-K gate dielectric oxide.
  12. Ahn,Kie Y.; Forbes,Leonard, Highly reliable amorphous high-k gate oxide ZrO2.
  13. Froment, Benoit, Increasing the capacitance of a capacitive device by micromasking.
  14. Matsuda, Takanori, Laminate having mono-crystal oxide conductive member on silicon substrate, actuator using such laminate, ink jet head and method for manufacturing such head.
  15. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide / hafnium oxide dielectric layers.
  16. Ahn,Kie Y.; Forbes,Leonard, Lanthanide oxide dielectric layer.
  17. Ueda,Tetsuzo, Layered substrates for epitaxial processing, and device.
  18. Ahn, Kie Y.; Forbes, Leonard, Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics.
  19. Ahn,Kie Y.; Forbes,Leonard, Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics.
  20. Ahn, Kie Y.; Forbes, Leonard, Low-temperature grown high quality ultra-thin CoTiOgate dielectrics.
  21. Ahn,Kie Y.; Forbes,Leonard, Low-temperature growth high-quality ultra-thin praseodymium gate dieletrics.
  22. Sato, Hideki, Method for evaluating crystal defects of silicon wafer.
  23. Eymery, Joël; Pochet, Pascal, Method for making a thin-film structure and resulting thin-film structure.
  24. Ahn, Kie Y.; Forbes, Leonard, Method of fabricating an apparatus having a lanthanum-metal oxide dielectric layer.
  25. Noguchi,Takashi; Xianyu,Wenxu, Method of fabricating single-crystal silicon film and method of fabricating TFT adopting the same.
  26. Yang, Tsun-Neng, Method of fabricating thin film interface for internal light reflection and impurities isolation.
  27. Bojarczuk, Jr.,Nestor Alexander; Copel,Matthew Warren; Guha,Supratik; Narayanan,Vijay, Method of forming lattice-matched structure on silicon and structure formed thereby.
  28. Ahn, Kie Y.; Forbes, Leonard, Methods for atomic-layer deposition.
  29. Weber,Cory E.; Armstrong,Mark; Kennel,Harold; Ghani,Tahir; Packan,Paul A.; Thompson,Scott, Nitrogen controlled growth of dislocation loop in stress enhanced transistor.
  30. Weber,Cory E.; Armstrong,Mark; Kennel,Harold; Ghani,Tahir; Packan,Paul A.; Thompson,Scott, Nitrogen controlled growth of dislocation loop in stress enhanced transistor.
  31. Ahn, Kie Y.; Forbes, Leonard, Ruthenium for a dielectric containing a lanthanide.
  32. Ahn, Kie Y.; Forbes, Leonard, Ruthenium for a dielectric containing a lanthanide.
  33. Ahn, Kie Y.; Forbes, Leonard, Ruthenium layer for a dielectric layer containing a lanthanide oxide.
  34. Bojarczuk, Jr., Nestor Alexander; Buchanan, Douglas Andrew; Guha, Supratik; Narayanan, Vijay; Ragnarsson, Lars-Ake, Semiconductor structure including mixed rare earth oxide formed on silicon.
  35. Bojarczuk, Jr.,Nestor Alexander; Buchanan,Douglas Andrew; Guha,Supratik; Narayanan,Vijay; Ragnarsson,Lars Ake, Semiconductor structure including mixed rare earth oxide formed on silicon.
  36. Park, Yeonjoon; Kim, Hyun Jung; Skuza, Jonathan R.; Lee, Kunik; King, Glen C.; Choi, Sang Hyouk, X-ray diffraction (XRD) characterization methods for sigma=3 twin defects in cubic semiconductor (100) wafers.
  37. Ahn, Kie Y.; Forbes, Leonard, Zirconium titanium oxide films.
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