Interposer to couple a microelectronic device package to a circuit board
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H05K-001/11
H05K-003/42
출원번호
US-0080438
(2002-02-21)
발명자
/ 주소
Pearson, Thomas E.
Arrigotti, George L.
Aspandiar, Raiyomand F.
Combs, Christopher D.
출원인 / 주소
Intel Corporation
대리인 / 주소
Blakely, Sokoloff, Taylor & Zafman LLP
인용정보
피인용 횟수 :
5인용 특허 :
7
초록▼
An interposer to couple a microelectronic device package to a motherboard is formed from a PCB substrate. Multiple via holes are drilled through a copper-clad PCB substrate and then coated inside with copper. The copper surface coating is etched to form multiple traces. In one embodiment, the substr
An interposer to couple a microelectronic device package to a motherboard is formed from a PCB substrate. Multiple via holes are drilled through a copper-clad PCB substrate and then coated inside with copper. The copper surface coating is etched to form multiple traces. In one embodiment, the substrate is cut through each row of via holes and between each row of via holes to produce multiple individual beam-and-trace interposers. Two or more such interposers may be affixed together to form a beam-and-trace interposer array. Alternatively, the substrate is not cut into strips, and each via hole is filled completely with a conductive material to form an array of solid conductive columns through the substrate.
대표청구항▼
1. An interposer to couple an electronic component package to a circuit board, the interposer comprising a plurality of beams coupled to each other, each of the beams comprisinga circuit board substrate having a first surface and a second surface;a first plurality of conductive contacts disposed on
1. An interposer to couple an electronic component package to a circuit board, the interposer comprising a plurality of beams coupled to each other, each of the beams comprisinga circuit board substrate having a first surface and a second surface;a first plurality of conductive contacts disposed on the first surface to be coupled to the electronic component package;a second plurality of conductive contacts disposed on the second surface to be coupled to the circuit board; anda plurality of conductive paths, each separately connecting one of the first plurality of conductive contacts with one of the second plurality of conductive contacts, wherein each of the conductive paths comprises a conductive coating formed in a recessed channel in an edge of the substrate, the edge perpendicular to the first surface and the second surface, wherein each of the recessed channels is a portion of a through hole. 2. An interposer as recited in claim 1, wherein the plurality of beams are coupled together to form an array of conductive paths to couple the electronic component package to the circuit board. 3. An interposer as recited in claim 1, further comprising a first plurality of grooves in the first surface between the first plurality of conductive contacts. 4. An interposer as recited in claim 3, further comprising a second plurality of grooves in the second surface between the second plurality of conductive contacts, parallel to the first plurality of grooves. 5. An interposer comprising:a circuit board substrate member having a first surface and a second surface parallel to each other, the substrate further having an edge perpendicular to the first surface and the second surface;a first plurality of conductive contact pads on the first surface;a second plurality of conductive contact pads on the second surface; anda plurality of recessed channels in the edge of the substrate member, extending from the first surface to the second surface, each of the recessed channels having a conductive material therein to form a conductive path between one of the first plurality of contact pads and one of the second plurality of contact pads; anda first plurality of grooves in the first surface between the contact pads on the first surface. 6. An interposer as recited in claim 5, wherein each of the recessed channels is a portion of a through hole. 7. An interposer as recited in claim 5, further comprising a second plurality of grooves in the second surface between the contact pads on the second surface. 8. An interposer as recited in claim 5, wherein the first plurality of conductive contact pads and the second plurality of conductive contact pads are spaced at an equal pitch. 9. A device to couple an electronic component package to a circuit board, the device comprising a plurality of interposers coupled to each other, each being an interposer as recited in claim 5. 10. A device as recited in claim 9, wherein the plurality of interposers are coupled together to form an array of conductive paths to couple the electronic component package to the circuit board. 11. An interposer comprising:a circuit board substrate having a first surface and a second surface parallel to each other;a first plurality of conductive contact pads on the first surface;a second plurality of conductive contact pads on the second surface;a plurality of solid conductive columns through the substrate perpendicular to the first surface and the second surface, each in electrical contact with one of the first plurality of contact pads and one of the second plurality of contact pads; anda first plurality of grooves in the first surface between the conductive columns on the first surface. 12. An interposer as recited in claim 11, further comprising a second plurality of grooves in the second surface between the conductive columns on the second surface. 13. An interposer as recited in claim 12, further comprising:a third plurality of grooves in the first surface between the conductive columns, perpendicular to the first plurality of grooves; anda fourth plurality of grooves in the second surface between the conductive columns, perpendicular to the second plurality of grooves. 14. An interposer as recited in claim 11, wherein the conductive columns are formed from an alloy of tin (Sn) and lead (Pb), comprising at least 81% lead (Pb). 15. An apparatus comprising:a die;a package coupled to the die; andan interposer coupled to the package and formed from a circuit board substrate, by which the apparatus can be electrically coupled to a circuit board, the interposer comprisinga first surface on which are disposed a first plurality of contacts through which the interposer is coupled to the package,a second surface on which are disposed a second plurality of contacts to couple the interposer to the circuit board,a plurality of conductive paths between the first surface and the second surface, each of the conductive paths formed by a solid conductive column through the substrate;a first plurality of grooves in the first surface between the conductive columns, anda second plurality of grooves in the first surface between the conductive columns, perpendicular to the first plurality of grooves. 16. An apparatus as recited in claim 15, wherein the interposer is to be fixedly coupled to the circuit board. 17. An apparatus as recited in claim 15, further comprising:a third plurality of grooves in the second surface between the conductive columns; anda fourth plurality of grooves in the second surface between the conductive columns, perpendicular to the third plurality of grooves. 18. An apparatus as recited in claim 15, wherein each of the conductive columns has a composition of tin (Sn) and lead (Pb), comprising at least 81% lead (Pb). 19. A method of coupling an electronic circuit package to a circuit board, the method comprising:fixedly coupling a plurality of electrical contacts on a first surface of an interposer to the electronic circuit package, the interposer formed from a plurality of beams coupled to each other, each of the beams comprising a circuit board substrate having the first surface, a second surface, and a plurality of conductive paths from the first surface to the second surface; andfixedly coupling a plurality of electrical contacts on the second surface of each of the beams to the circuit board. 20. A method as recited in claim 19, wherein the electronic circuit package includes a semiconductor die. 21. A method as recited in claim 20, wherein the circuit board is a motherboard.
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이 특허에 인용된 특허 (7)
Yamasaki Kozo,JPX ; Saiki Hajime,JPX, Connecting board with oval-shaped protrusions.
McKenzie ; Jr. Joseph A. (1933 Payton Cir. Colorado Springs CO 80915), Method for forming traces on side edges of printed circuit boards and devices formed thereby.
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