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FinFET device incorporating strained silicon in the channel region

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-027/105
출원번호 US-0335474 (2002-12-31)
발명자 / 주소
  • Lin, Ming-Ren
  • Goo, Jung-Suk
  • Wang, Haihong
  • Xiang, Qi
출원인 / 주소
  • Advanced Micro Devices, Inc.
대리인 / 주소
    Foley & Lardner LLP
인용정보 피인용 횟수 : 188  인용 특허 : 5

초록

A FinFET device employs strained silicon to enhance carrier mobility. In one method, a FinFET body is patterned from a layer of silicon germanium (SiGe) that overlies a dielectric layer. An epitaxial layer of silicon is then formed on the silicon germanium FinFET body. A strain is induced in the epi

대표청구항

1. A silicon on insulator (SOI) MOSFET device comprising:a substrate comprising a dielectric layer;a FinFET body formed on the dielectric layer, the FinFET body comprising source and drain regions having a channel region extending therebetween;a layer of strained silicon formed on surfaces of at lea

이 특허에 인용된 특허 (5)

  1. Ahmed, Shibly S.; Wang, Haihong; Yu, Bin, Double gate semiconductor device having separate gates.
  2. Yu, Bin, Fabrication of a field effect transistor with a recess in a semiconductor pillar in SOI technology.
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  4. Bin Yu, Method of forming a double gate transistor having an epitaxial silicon/germanium channel region.
  5. Clark, William F.; Fried, David M.; Lanzerotti, Louis D.; Nowak, Edward J., Strained fin FETs structure and method.

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