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Voltage compensated integrated circuits 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-003/037
  • H03K-003/12
출원번호 US-0439665 (2003-05-16)
발명자 / 주소
  • Fu, Robert
  • Osborn, Neal A.
  • Burr, James B.
출원인 / 주소
  • Transmeta Corporation
대리인 / 주소
    Wagner, Murabito & Hao LLP
인용정보 피인용 횟수 : 49  인용 특허 : 10

초록

A method and system of voltage compensated integrated circuits. Operating characteristics of integrated circuitry are enhanced by application of voltage compensation.

대표청구항

1. An integrated circuit comprising:a first stage comprising first transistor devices comprising a first threshold voltage;a first feedback stage comprising transistor devices comprising a first plurality of threshold voltages, wherein at least one of said first plurality of threshold voltages is di

이 특허에 인용된 특허 (10)

  1. Veendrick Hendrikus J. M. (Eindhoven NLX) Van Den Elshout Andreas A. J. M. (Eindhoven NLX) Huizer Cornelis M. (Eindhoven NLX), Flip-flop circuit having transfer gate delay.
  2. Ko Uming, Hybrid dual threshold transistor multiplexer.
  3. Ko Uming, Hybrid dual threshold transistor registers.
  4. Burr, James B., Low voltage latch with uniform sizing.
  5. Stotz Dan ; Rosenberry Raymond W ; Townley Kent R ; Stong Gayvin E, Master-slave flip-flop and method.
  6. Stan, Mircea; Jasmin, James E., Multi-threshold flip-flop circuit having an outside feedback.
  7. Gersbach John Edwin, Pull-up and pull-down circuits.
  8. Motley Gordon W. (Ft. Collins CO) Meier Peter J. (Ft. Collins CO) Miller Brian C. (Ft. Collins CO), Quick resolving latch.
  9. Okamoto Toshiharu,JPX, Ring oscillator and delay circuit using low threshold voltage type MOSFETS.
  10. Kwasniewski Tadeus (Ottawa CAX) Abou-Seido Maamoun (Ottawa CAX) Iliasevitch Stephan (Nepean CAX), Ring oscillator having a substantially sinusoidal signal.

이 특허를 인용한 특허 (49)

  1. Bennett,George J., Adjusting on-time for a discontinuous switching voltage regulator.
  2. Bennett,George J., Adjusting power consumption of digital circuitry relative to critical path circuit having the largest propagation delay error.
  3. Kupferman, Hanan, Adjusting voltage delivered to disk drive circuitry based on a selected zone.
  4. Pitkethly, Scott; Masleid, Robert Paul, Advanced repeater utilizing signal distribution delay.
  5. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  6. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  7. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  8. Masleid, Robert Paul; Dholabhai, Vatsal, Circuit with enhanced mode and normal mode.
  9. Masleid, Robert Paul; Kowalczyk, Andre, Circuits and methods for detecting and assisting wire transitions.
  10. Masleid, Robert, Circuits, systems and methods relating to a dynamic dual domino ring oscillator.
  11. Masleid,Robert P., Circuits, systems and methods relating to dynamic ring oscillators.
  12. Bollapalli, Kalyana; Raja, Tezaswi, Clock generation circuit that tracks critical path across process, voltage and temperature variation.
  13. Bollapalli, Kalyana; Raja, Tezaswi, Clock generation circuit that tracks critical path across process, voltage and temperature variation.
  14. Felix, Stephen; Bond, Jeffery; Raja, Tezaswi; Bollapalli, Kalyana; Mehta, Vikram, Closed loop dynamic voltage and frequency scaling.
  15. Masleid, Robert Paul, Column select multiplexer circuit for a domino random access memory array.
  16. Masleid,Robert P., Column select multiplexer circuit for a domino random access memory array.
  17. Masleid, Robert Paul, Configurable delay chain with stacked inverter delay elements.
  18. Masleid, Robert Paul, Configurable tapered delay chain with multiple sizes of delay elements.
  19. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  20. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  21. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  22. Ferris, Timothy A., Data storage device comprising dual mode independent/parallel voltage regulators.
  23. Masleid, Robert P, Dynamic ring oscillators.
  24. Asa,Gil; Moshe,David, High-gain synchronizer circuitry and methods.
  25. Pant, Sanjay; Raja, Tezaswi; Charnas, Andy, Integrated voltage regulator with in-built process, temperature and aging compensation.
  26. Pant, Sanjay; Raja, Tezaswi; Charnas, Andy, Integrated voltage regulator with in-built process, temperature and aging compensation.
  27. Masleid, Robert P, Inverting zipper repeater circuit.
  28. Masleid, Robert P., Inverting zipper repeater circuit.
  29. Masleid, Robert Paul, Inverting zipper repeater circuit.
  30. Masleid, Robert, Leakage efficient anti-glitch filter.
  31. Bennett, George J., Oscillator comprising foldover detection.
  32. Masleid, Robert Paul, Power efficient multiplexer.
  33. Masleid, Robert Paul, Power efficient multiplexer.
  34. Masleid, Robert Paul, Power efficient multiplexer.
  35. Masleid, Robert Paul, Power efficient multiplexer.
  36. Masleid, Robert Paul; Dholabhai, Vatsal; Klingner, Christian, Repeater circuit having different operating and reset voltage ranges, and methods thereof.
  37. Masleid, Robert Paul; Dholabhai, Vatsal, Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability.
  38. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
  39. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
  40. Masleid, Robert Paul; Sousa, Jose; Kottapalli, Venkata, Scannable dynamic circuit latch.
  41. Masleid, Robert P.; Burr, James B., Stacked inverter delay chain.
  42. Swarna, Madhu; Raja, Tezaswi, Supply-voltage control for device power management.
  43. Bennett,George J., Switching voltage regulator comprising a cycle comparator for dynamic voltage scaling.
  44. Bennett, George J.; Vasquez, Steven R., Switching voltage regulator employing current pre-adjust based on power mode.
  45. Fu,Robert, Temperature compensated integrated circuits.
  46. Pitkethly, Scott; Masleid, Robert P., Triple latch flip flop system and method.
  47. Pitkethly,Scott; Masleid,Robert P., Triple latch flip flop system and method.
  48. Fu, Robert; Osborn, Neal A.; Burr, James B., Voltage compensated integrated circuits.
  49. Fu,Robert; Osborn,Neal A.; Burr,James B., Voltage compensated integrated circuits.
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