$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Temporary coatings for protection of microelectronic devices during packaging

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-02334
출원번호 US-0955722 (2001-09-18)
발명자 / 주소
  • Peterson, Kenneth A.
  • Conley, William R.
출원인 / 주소
  • Sandia Corporation
인용정보 피인용 횟수 : 40  인용 특허 : 11

초록

The present invention relates to a method of protecting a microelectronic device during device packaging, including the steps of applying a water-insoluble, temporary protective coating to a sensitive area on the device; performing at least one packaging step; and then substantially removing the pro

대표청구항

1. A temporarily protected, non-functioning MEMS device, comprising:a released MEMS device disposed on a substrate; and a temporary, immobilizing coating directly contacting and immobilizing the released MEMS device; wherein the temporary, immobilizing coating is selected from the group consisting o

이 특허에 인용된 특허 (11)

  1. Higgins ; III Leo M. (Austin TX), Area array semiconductor device having a lid with functional contacts.
  2. Heffner Kenneth H. ; Anderson Curtis W., Coating integrated circuits using thermal spray.
  3. Ross Downey Havens ; Robert Maynard Japp ; Jeffrey Alan Knight ; Mark David Poliks ; Anne M. Quinn, Electronic package utilizing protective coating.
  4. Najafi Nader ; Massoud-Ansari Sonbol, Method for packaging microsensors.
  5. Smith James H. ; Ricco Antonio J., Method for preventing micromechanical structures from adhering to another object.
  6. Kaeriyama Toshiyuki,JPX ; Harada Takeshi,JPX, Method of cleaning wafer after partial saw.
  7. Kao Pai-Hsiang ; Mathew Ranjan J. ; De Vera Cornelio, Methods and apparatuses for singulation of microelectromechanical systems.
  8. Heffner Kenneth H. ; Anderson Curtis W., Multilayer protective coating for integrated circuits and multichip modules and method of applying same.
  9. Degani Yinon (Highland Park NJ) Kossives Dean P. (Glen Gardner NJ), Process for fabircating an integrated circuit.
  10. Murakami Gen (Machida JPX) Gappa Takeshi (Ohme JPX), Semiconductor device and a method of producing the same.
  11. Sooriakumar K. (Scottsdale AZ) Monk David J. (Mesa AZ) Chan Wendy K. (Scottsdale AZ) Goldman Kenneth G. (Chandler AZ), Vertically integrated sensor structure and method.

이 특허를 인용한 특허 (40)

  1. Robinson, Marc E.; Vindasius, Alfons; Almen, Donald; Jacobsen, Larry, Assembly having stacked die mounted on substrate.
  2. Vindasius, Al; Robinson, Marc E.; Jacobsen, Larry; Almen, Donald, Assembly having stacked die mounted on substrate.
  3. Co, Reynaldo; Leal, Jeffrey S.; Pangrle, Suzette K.; McGrath, Scott; Melcher, De Ann Eileen; Barrie, Keith L.; Villavicencio, Grant; Del Rosario, Elmer M.; Bray, John R., Electrical connector between die pad and z-interconnect for stacked die assemblies.
  4. Co, Reynaldo; Leal, Jeffrey S.; Pangrle, Suzette K.; McGrath, Scott; Melcher, DeAnn Eileen; Barrie, Keith L.; Villavicencio, Grant; del Rosario, Elmer M.; Bray, John R., Electrical connector between die pad and z-interconnect for stacked die assemblies.
  5. Co, Reynaldo; Villavicencio, Grant; Leal, Jeffrey S.; McElrea, Simon J. S., Electrical interconnect for die stacked in zig-zag configuration.
  6. McElrea, Simon J. S.; Andrews, Jr., Lawrence Douglas; McGrath, Scott; Caskey, Terrence; Crane, Scott Jay; Robinson, Marc E.; Cantillep, Loreto, Electrically interconnected stacked die assemblies.
  7. McElrea, Simon J. S.; Andrews, Jr., Lawrence Douglas; McGrath, Scott; Caskey, Terrence; Crane, Scott Jay; Robinson, Marc E.; Cantillep, Loreto, Electrically interconnected stacked die assemblies.
  8. Tao, Min; Sun, Zhuowen; Kim, Hoki; Zohni, Wael; Agrawal, Akash, Enhanced density assembly having microelectronic packages mounted at substantial angle to board.
  9. Katkar, Rajesh; Co, Reynaldo; McGrath, Scott; Prabhu, Ashok S.; Lee, Sangil; Wang, Liang; Shen, Hong, Flipped die stack.
  10. Prabhu, Ashok S.; Katkar, Rajesh; Wang, Liang; Uzoh, Cyprian Emeka, Flipped die stack assemblies with leadframe interconnects.
  11. Delacruz, Javier A.; Haba, Belgacem; Vu, Tu Tam; Katkar, Rajesh, Flipped die stacks with multiple rows of leadframe interconnects.
  12. Delacruz, Javier A.; Haba, Belgacem; Vu, Tu Tam; Katkar, Rajesh, Flipped die stacks with multiple rows of leadframe interconnects.
  13. Haluzak,Charles C.; Pollard,Jeffrey R., MEMS packaging structure and methods.
  14. Suzuki,Mikimasa; Noritake,Chikage, Method for manufacturing semiconductor power device.
  15. Loeppert,Peter V., Method for singulating a released microelectromechanical system wafer.
  16. Chen, Han-Wen; Verhaverbeke, Steven; Gouk, Roman; See, Guan Huei; Gu, Yu; Sundarrajan, Arvind; Cho, Kyuil; Neikirk, Colin Costano; Fu, Boyi, Method of reconstituted substrate formation for advanced packaging applications.
  17. Gerner, Bradley J.; Andrews, John R.; Dolan, Bryan R.; Lin, Pinyen, Method of removing thermoset polymer from piezoelectric transducers in a print head.
  18. Gerner, Bradley J.; Andrews, John R.; Dolan, Bryan R.; Lin, Pinyen, Method of removing thermoset polymer from piezoelectric transducers in a print head.
  19. DeSimone, Joseph M.; Rolland, Jason P.; Rothrock, Ginger M. Denison; Resnick, Paul, Methods and materials for fabricating microfluidic devices.
  20. DeSimone, Joseph M.; Rolland, Jason P.; Rothrock, Ginger M. Denison; Resnick, Paul, Methods and materials for fabricating microfluidic devices.
  21. Haba, Belgacem; Sun, Zhuowen; Delacruz, Javier A., Microelectronic packages and assemblies with improved flyby signaling operation.
  22. DeSimone, Joseph M.; Rolland, Jason P.; Quake, Stephen R.; Schorzman, Derek A.; Yarbrough, Jason; Van Dam, Michael, Photocurable perfluoropolyethers for use as novel materials in microfluidic devices.
  23. Daubenspeck, Timothy H.; Gambino, Jeffrey P.; Lasky, Jerome B.; Muzzy, Christopher D.; Sauter, Wolfgang, Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch.
  24. Daubenspeck,Timothy H.; Gambino,Jeffrey P.; Lasky,Jerome B.; Muzzy,Christopher D.; Sauter,Wolfgang, Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch.
  25. Higashi, Mitsutoshi, Production methods of electronic devices.
  26. Leal, Jeffrey S., Selective die electrical insulation by additive process.
  27. Leal, Jeffrey S., Selective die electrical insulation by additive process.
  28. Oliver, Steve; Farnworth, Warren, Semiconductor device having backside redistribution layers.
  29. Oliver, Steve; Farnworth, Warren, Semiconductor device having backside redistribution layers and method for fabricating the same.
  30. Mahler, Joachim; Yong, Wae Chet; Doraisamy, Stanley Job; Deml, Gerhard; Fischer, Rupert; Engl, Reimund, Semiconductor device including isolation layer.
  31. Co, Reynaldo; Melcher, DeAnn Eileen; Pan, Weiping; Villavicencio, Grant, Semiconductor die array structure.
  32. Crane, Scott Jay; McElrea, Simon J. S.; McGrath, Scott; Pan, Weiping; Melcher, De Ann Eileen; Robinson, Marc E., Semiconductor die mount by conformal die coating.
  33. Crane, Scott Jay; McElrea, Simon J. S.; McGrath, Scott; Pan, Weiping; Melcher, De Ann Eileen; Robinson, Marc E., Semiconductor die mount by conformal die coating.
  34. Crane, Scott Jay; McElrea, Simon J. S.; McGrath, Scott; Pan, Weiping; Melcher, DeAnn Eileen; Robinson, Marc E., Semiconductor die mount by conformal die coating.
  35. McGrath, Scott; Leal, Jeffrey S.; Shenoy, Ravi; Cantillep, Loreto; McElrea, Simon; Pangrle, Suzette K., Stacked die assembly having reduced stress electrical interconnects.
  36. McElrea, Simon J. S.; Robinson, Marc E.; Andrews, Jr., Lawrence Douglas, Support mounted electrically interconnected die assembly.
  37. Vindasius, Al; Robinson, Marc, Three dimensional six surface conformal die coating.
  38. Prabhu, Ashok S.; Katkar, Rajesh; Moran, Sean, Wafer-level flipped die stacks with leadframes or metal foil interconnects.
  39. Prabhu, Ashok S.; Katkar, Rajesh; Moran, Sean, Wafer-level flipped die stacks with leadframes or metal foil interconnects.
  40. Pan, Shaoher X.; Novotny, Vlad, Wafer-level packaging of micro devices.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트