IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0745179
(2003-12-23)
|
우선권정보 |
DE-0061433 (2002-12-30) |
발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
5 인용 특허 :
6 |
초록
▼
A circuit arrangement is provided for actuating a semiconductor switch connected in series with an inductive load. The circuit includes a first input terminal for supplying an input signal which governs whether the semiconductor switch is on or off, a second input terminal for supplying a voltage me
A circuit arrangement is provided for actuating a semiconductor switch connected in series with an inductive load. The circuit includes a first input terminal for supplying an input signal which governs whether the semiconductor switch is on or off, a second input terminal for supplying a voltage measurement signal, and an output terminal for providing an actuation signal for the semiconductor switch. Connected between the first input terminal and the output terminal is a driver circuit which, for a given level of the input signal, takes a control signal as a basis for generating an actuation signal having a first or a second signal profile. To generate the control signal, a control signal generation circuit is provided which takes a stipulation by the first input signal as a basis for sensing a value of the voltage measurement signal in order to provide a sample value and generates the control signal on the basis of a comparison between the instantaneous voltage measurement signal, or a signal which is dependent thereon, and a reference value which is dependent on the sample value, or the sample value itself.
대표청구항
▼
1. A circuit arrangement for actuating a semiconductor switch connected in series with an inductive load, the circuit arrangement comprising:a first input terminal for supplying an input signal; a second input terminal for supplying a voltage measurement signal; an output terminal for providing an a
1. A circuit arrangement for actuating a semiconductor switch connected in series with an inductive load, the circuit arrangement comprising:a first input terminal for supplying an input signal; a second input terminal for supplying a voltage measurement signal; an output terminal for providing an actuation signal to the semiconductor switch; a control signal generation circuit configured to receive the first input signal and to sense a value of the voltage measurement signal based on the first input signal in order to provide a sample value, wherein the control signal generation circuit generates a control signal on the basis of a comparison that involves the sample value and the voltage measurement signal; and a driver circuit connected between the first input terminal and the output terminal, wherein the driver circuit generates the actuation signal based on the control signal for a given level of the input signal, wherein the actuation signal has a signal profile. 2. The circuit arrangement of claim 1, wherein the control signal generation circuit generates the control signal based on a comparison between the voltage measurement signal and a reference signal, which is dependant on the sample value.3. The circuit arrangement of claim 2, wherein the reference signal is between 60% and 95% of the sample value.4. The circuit arrangement of claim 2, wherein the reference signal is between 70% and 80% of the sample value.5. The circuit arrangement of claim 1, wherein the control signal generation circuit generates the control signal based on a comparison between the sample value and a signal that is related to the voltage measurement signal.6. The circuit arrangement of claim 5, wherein the signal that is related to the voltage measurement signal corresponds to 0.95-1 to 0.6-1 times the voltage measurement signal.7. The circuit arrangement of claim 5, wherein the signal that is related to the voltage measurement signal corresponds to 0.7-1 to 0.8-1 times the voltage measurement signal.8. The circuit arrangement of claim 1, wherein the control signal generation circuit generates the sample value upon every rising edge of the input signal.9. The circuit arrangement of claim 1, wherein the control signal generation circuit generates the sample value upon every falling edge of the input signal.10. The circuit arrangement of claim 1, wherein the control signal generation circuit comprises:a sensing element to which the input signal and the voltage measurement signal are supplied and which takes a stipulation by the input signal as a basis for sensing a value of the voltage measurement signal and provides the sample value that is dependent on the voltage measurement signal; a reference value generation circuit which provides a reference value from the sample value; and a comparator arrangement which compares the reference value with the voltage measurement signal and provides the control signal on the basis of the result of the comparison. 11. The circuit arrangement of claim 10, wherein the sensing element is a sample and hold element.12. The circuit arrangement of claim 10, wherein the sensing element is a peak value sensing and storage element.13. The circuit arrangement of claim 1, further comprising:a sensing element to which the input signal and the voltage measurement signal are supplied and which takes a stipulation by the input signal as a basis for sensing a value of the voltage measurement signal and provides the sample value that is dependent on the voltage measurement signal; a filter circuit which takes the voltage measurement signal and provides a signal which is dependent thereon; a comparator arrangement which compares the sample value with the signal that is dependent on the voltage measurement signal, and provides the control signal on the basis of the comparison result. 14. The circuit arrangement of claim 1, wherein the driver circuit generates, for a first level of the input signal, an actuation signal with an actuation pattern on the basis of the control signal.15. The circuit arrangement of claim 14, wherein the actuation pattern has been chosen such that a charging current on a control connection on the semiconductor switch is reduced for a prescribed length of time.16. A method for generating an actuation signal for a semiconductor switch connected in series with an inductive load, the method comprising the steps:providing an input signal that controls whether the semiconductor switch is on or off; providing a voltage measurement signal that is dependent on a voltage across the load; sensing a value of the voltage measurement signal based on the input signal in order to provide a sample value that is dependent on the voltage measurement signal; generating a control signal based on a comparison involving the sample value and the voltage measurement signal; and generating an actuation signal with an actuating pattern on the basis of the control signal. 17. The method of claim 16, wherein the voltage measurement signal is compared with a reference value, which is dependent on the sample value, and wherein the reference value is between 60% and 95% of the sample value.18. The method of claim 16, wherein the voltage measurement signal is compared with a reference value, which is dependent on the sample value, and wherein the reference value is between 70% and 80% of the sample value.19. The method of claim 16, wherein the sample value is compared with a value dependent on the voltage measurement signal, and wherein the value dependent on the voltage measurement signal corresponds to 0.95-1 to 0.6-1 times the voltage measurement signal.20. The method of claim 16, wherein the sample value is compared with a value dependent on the voltage measurement signal, and wherein the value dependent on the voltage measurement signal corresponds to 0.7-1 to 0.8-1 times the voltage measurement signal.21. The method of claim 16, wherein the actuation signal has a first signal profile for a first level of the input signal and for a first level of the control signal and has a second signal profile for a first level of the input signal and for a second level of the control signal.22. The method of claim 21, wherein the second signal profile is chosen such that a charging current on a control connection on the semiconductor switch is reduced for a prescribed period of time in order to round off an edge of the current profile of a load current through the semiconductor switch.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.