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Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/80
출원번호 US-0916141 (2001-07-25)
발명자 / 주소
  • Hogenauer, Eugene B.
출원인 / 주소
  • Quicksilver Technology
대리인 / 주소
    Sawyer Law Group LLP
인용정보 피인용 횟수 : 63  인용 특허 : 4

초록

Aspects of a method and system for digital signal processing within an adaptive computing engine are described. These aspects include a mini-matrix, the mini-matrix comprising a set of composite blocks, each composite block capable of executing a predetermined set of instructions. A sequencer is inc

대표청구항

1. A system for digital signal processing within an adaptive computing engine, the system comprising:a mini-matrix, the mini-matrix comprising a set of composite blocks, each composite block capable of executing a predetermined set of instructions; a sequencer for controlling the set of composite bl

이 특허에 인용된 특허 (4)

  1. Kadowaki Yukio,JPX, Digital signal processing device.
  2. Garde, Douglas, Digital signal processor having distributed register file.
  3. Thomas L. Drabenstott ; Gerald G. Pechanek ; Edwin F. Barry ; Charles W. Kurak, Jr., Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution.
  4. Chiarulli Donald M. (4724 Newcomb Dr. Baton Rouge LA 70808) Rudd W. G. (Dept. of Computer Science Oregon State University Corvallis OR 97331) Buell Duncan A. (1212 Chippenham Dr. Baton Rouge LA 70808, Processor utilizing reconfigurable process segments to accomodate data word length.

이 특허를 인용한 특허 (63)

  1. Langhammer, Martin; Nguyen, Triet M.; Lin, Yi-Wen, Adder-rounder circuitry for specialized processing block in programmable logic device.
  2. Langhammer, Martin, Angular range reduction in an integrated circuit device.
  3. Langhammer, Martin, Calculation of trigonometric functions in an integrated circuit device.
  4. Langhammer, Martin, Calculation of trigonometric functions in an integrated circuit device.
  5. Langhammer, Martin, Calculation of trigonometric functions in an integrated circuit device.
  6. Langhammer, Martin, Calculation of trigonometric functions in an integrated circuit device.
  7. Langhammer, Martin, Combined adder and pre-adder for high-radix multiplier circuit.
  8. Langhammer, Martin, Combined floating point adder and subtractor.
  9. Mauer, Volker, Combined interpolation and decimation filter for programmable logic device.
  10. Langhammer, Martin, Computing floating-point polynomials in an integrated circuit device.
  11. Langhammer, Martin; Pasca, Bogdan, Computing floating-point polynomials in an integrated circuit device.
  12. Langhammer, Martin, Configuring a programmable integrated circuit device to perform matrix multiplication.
  13. Langhammer, Martin, Configuring floating point operations in a programmable device.
  14. Langhammer, Martin, Configuring floating point operations in a programmable logic device.
  15. Leung, Wai-Bor; Lui, Henry Y., DSP block for implementing large multiplier on a programmable integrated circuit device.
  16. Demirsoy, Suleyman Sirri; Yi, Hyun, Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering.
  17. Demirsoy, Suleyman Sirri; Yi, Hyun, Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering.
  18. Demirsoy, Suleyman; Yi, Hyun, Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering.
  19. Langhammer, Martin, Digital signal processing circuitry with redundancy and ability to support larger multipliers.
  20. Langhammer, Martin; Lin, Yi-Wen; Streicher, Keone, Digital signal processing circuitry with redundancy and bidirectional data paths.
  21. Langhammer, Martin, Discrete Fourier Transform in an integrated circuit device.
  22. Langhammer, Martin, Double-clocked specialized processing block in an integrated circuit device.
  23. Chou, Shin-I, High-rate interpolation or decimation filter in integrated circuit device.
  24. Langhammer, Martin, Implementing division in a programmable integrated circuit device.
  25. Langhammer, Martin, Implementing large multipliers in a programmable integrated circuit device.
  26. Langhammer, Martin, Implementing mixed-precision floating-point operations in a programmable integrated circuit device.
  27. Langhammer, Martin, Implementing multipliers in a programmable integrated circuit device.
  28. Langhammer, Martin; Tharmalingam, Kumara, Large multiplier for programmable logic device.
  29. Langhammer, Martin; Tharmalingam, Kumara, Large multiplier for programmable logic device.
  30. Langhammer, Martin; Tharmalingam, Kumara, Large multiplier for programmable logic device.
  31. Langhammer, Martin; Tharmalingam, Kumara, Large multiplier for programmable logic device.
  32. Langhammer, Martin, Matrix decomposition in an integrated circuit device.
  33. Kurtz, Brian L., Matrix operations in an integrated circuit device.
  34. Langhammer, Martin, Matrix operations in an integrated circuit device.
  35. Kizhepat,Govind, Method and apparatus for performing computations and operations on data using data steering.
  36. Mauer, Volker; Demirsoy, Suleyman Sirri, Method for configuring a finite impulse response filter in a programmable logic device.
  37. Streicher, Keone; Langhammer, Martin; Lin, Yi-Wen; Leung, Wai-Bor; Lewis, David; Mauer, Volker; Lui, Henry Y.; Demirsoy, Suleyman Sirri; Yi, Hyun, Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry.
  38. Streicher, Keone; Langhammer, Martin; Lin, Yi-Wen; Leung, Wai-Bor; Lewis, David; Mauer, Volker; Lui, Henry Y.; Demirsoy, Suleyman Sirri; Yi, Hyun, Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry.
  39. Streicher, Keone; Langhammer, Martin; Lin, Yi-Wen; Leung, Wai-Bor; Lewis, David; Mauer, Volker; Lui, Henry Y.; Demirsoy, Suleyman Sirri; Yi, Hyun, Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry.
  40. Langhammer, Martin, Multi-operand floating point operations in a programmable integrated circuit device.
  41. Langhammer, Martin, Multiple-precision processing block in a programmable integrated circuit device.
  42. Choe, Kok Heng; Ngai, Tony K; Lui, Henry Y., Multiplier-accumulator circuitry and methods.
  43. Langhammer, Martin, Normalization of floating point operations in a programmable integrated circuit device.
  44. Langhammer, Martin, Normalization of floating point operations in a programmable integrated circuit device.
  45. Mauer, Volker; Langhammer, Martin, Pipelined systolic finite impulse response filter.
  46. Langhammer, Martin, Polynomial calculations optimized for programmable integrated circuit device structures.
  47. Langhammer, Martin, Programmable device using fixed and configurable logic to implement floating-point rounding.
  48. Langhammer, Martin, Programmable device using fixed and configurable logic to implement recursive trees.
  49. Mauer, Volker; Langhammer, Martin, Programmable device with specialized multiplier blocks.
  50. Langhammer,Martin, Programmable logic device with routing channels.
  51. Langhammer,Martin, Programmable logic device with routing channels.
  52. Langhammer, Martin, QR decomposition in an integrated circuit device.
  53. Mauer, Volker, QR decomposition in an integrated circuit device.
  54. Fukatsu, Tsutomu, Reconfigurable data processing device and method.
  55. Langhammer, Martin; Dhanoa, Kulwinder, Solving linear matrices in an integrated circuit device.
  56. Langhammer, Martin, Specialized processing block for implementing floating-point multiplier with subnormal operation support.
  57. Xu, Lei; Mauer, Volker; Perry, Steven, Specialized processing block for programmable integrated circuit device.
  58. Langhammer, Martin; Lee, Kwan Yee Martin; Azgomi, Orang; Streicher, Keone; Lin, Yi-Wen, Specialized processing block for programmable logic device.
  59. Langhammer, Martin; Lee, Kwan Yee Martin; Azgomi, Orang; Streicher, Keone; Pelt, Robert L., Specialized processing block for programmable logic device.
  60. Langhammer, Martin; Lee, Kwan Yee Martin; Nguyen, Triet M.; Streicher, Keone; Azgomi, Orang, Specialized processing block for programmable logic device.
  61. Lee, Kwan Yee Martin; Langhammer, Martin; Lin, Yi-Wen; Nguyen, Triet M., Specialized processing block for programmable logic device.
  62. Lee, Kwan Yee Martin; Langhammer, Martin; Nguyen, Triet M.; Lin, Yi-Wen, Specialized processing block for programmable logic device.
  63. Langhammer, Martin, Specialized processing block with fixed- and floating-point structures.
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