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System and method for measuring transistor leakage current with a ring oscillator 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G01R-031/26
출원번호 US-0124152 (2002-04-16)
발명자 / 주소
  • Suzuki, Shingo
  • Burr, James
출원인 / 주소
  • Transmeta Corporation
대리인 / 주소
    Wagner, Murabito, &
인용정보 피인용 횟수 : 77  인용 특허 : 11

초록

A method of measuring the transistor leakage current. In one embodiment, the method involves driving a ring oscillator with a dynamic node driver having a leakage test device biased to an off state to produce a test signal. The test signal is extracted and the frequency is measured. The leakage curr

대표청구항

1. A method of estimating leakage current, said method comprising:driving a ring oscillator with a dynamic node driver, said dynamic node driver comprising: a pre-charge device; and a leakage test device, said leakage test device biased to an off state with said pre-charge device coupled to said lea

이 특허에 인용된 특허 (11)

  1. Loughmiller Daniel R. ; Sher Joseph C. ; Duesman Kevin G., Circuit and method for measuring and forcing an internal voltage of an integrated circuit.
  2. Ho Michael Duc ; Le Duy-Loan T. ; Smith Scott E., Circuit for driving conductive line and testing conductive line for current leakage.
  3. Nakashima Teruya (Kanagawa JPX) Umeyama Takehiko (Hyogo JPX), Current control circuit of ring oscillator.
  4. Yuzuki Toshiyuki,JPX, Electronic clock having an electric power generating element.
  5. Wojciechowski Kenneth E. (Folsom CA), Low current reduced area programming voltage detector for flash memory.
  6. Eitan Boaz,ILX, Low power programmable ring oscillator.
  7. Itoh Nobuhiko (Tenri JPX) Ihara Makoto (Sakurai JPX), Ring oscillator having a variable oscillating frequency.
  8. Cho Ho Youb,KRX ; Oh Jin Keun,KRX, Self-refresh apparatus for a semiconductor memory device.
  9. Jeong Dong Sik (Kyoungki-do KRX), Self-refresh period adjustment circuit for semiconductor memory device.
  10. Shigeki Tomishima JP, Semiconductor device provided with boost circuit consuming less current.
  11. Ishibashi Atsuhiko,JPX, Voltage controlled ring oscillator stabilized against supply voltage fluctuations.

이 특허를 인용한 특허 (77)

  1. Sheng, Eric Chen-Li; Ward, Matthew Robert, Adaptive control of operating and body bias voltages.
  2. Sheng, Eric Chen-Li; Ward, Matthew Robert, Adaptive control of operating and body bias voltages.
  3. Read, Andrew; Wing, Malcolm; Kordus, Louis C.; Stewart, Thomas E., Adaptive power control based on pre package characterization of integrated circuits.
  4. Sheng, Eric Chien-Li; Kawasumi, Steven, Adaptive voltage control by accessing information stored within and specific to a microprocessor.
  5. Pitkethly, Scott; Masleid, Robert Paul, Advanced repeater utilizing signal distribution delay.
  6. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  7. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  8. Pitkethly, Scott, Advanced repeater with duty cycle adjustment.
  9. Yuan, Xiao-Jie; Hart, Michael J.; Ling, Zicheng G.; Young, Steven P., Characterizing circuit performance by separating device and interconnect impact on signal delay.
  10. Yuan,Xiao Jie; Hart,Michael J.; Ling,Zicheng G.; Young,Steven P., Characterizing circuit performance by separating device and interconnect impact on signal delay.
  11. Yuan,Xiao Jie; Hart,Michael J.; Ling,Zicheng G.; Young,Steven P., Characterizing circuit performance by separating device and interconnect impact on signal delay.
  12. Masleid, Robert Paul; Dholabhai, Vatsal, Circuit with enhanced mode and normal mode.
  13. Masleid, Robert Paul; Kowalczyk, Andre, Circuits and methods for detecting and assisting wire transitions.
  14. Masleid, Robert, Circuits, systems and methods relating to a dynamic dual domino ring oscillator.
  15. Masleid,Robert P., Circuits, systems and methods relating to dynamic ring oscillators.
  16. Bollapalli, Kalyana; Raja, Tezaswi, Clock generation circuit that tracks critical path across process, voltage and temperature variation.
  17. Bollapalli, Kalyana; Raja, Tezaswi, Clock generation circuit that tracks critical path across process, voltage and temperature variation.
  18. Felix, Stephen; Bond, Jeffery; Raja, Tezaswi; Bollapalli, Kalyana; Mehta, Vikram, Closed loop dynamic voltage and frequency scaling.
  19. Koniaris, Kleanthes G.; Burr, James B., Closed loop feedback control of integrated circuits.
  20. Koniaris, Kleanthes G.; Burr, James B., Closed loop feedback control of integrated circuits.
  21. Masleid, Robert Paul, Column select multiplexer circuit for a domino random access memory array.
  22. Masleid,Robert P., Column select multiplexer circuit for a domino random access memory array.
  23. Masleid, Robert Paul, Configurable delay chain with stacked inverter delay elements.
  24. Masleid, Robert Paul, Configurable tapered delay chain with multiple sizes of delay elements.
  25. Poppe, Wojciech Jakub; Elkin, Ilyas; Gupta, Puneet, Coupling resistance and capacitance analysis systems and methods.
  26. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  27. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  28. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
  29. Singh, Abhishek; Poppe, Wojciech Jakub; Elkin, Ilyas, Determining on-chip voltage and temperature.
  30. Masleid, Robert P, Dynamic ring oscillators.
  31. Chen, Tien-Min, Feedback-controlled body-bias voltage source.
  32. Chen, Tien-Min, Feedback-controlled body-bias voltage source.
  33. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  34. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  35. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  36. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  37. Koniaris,Kleanthes G.; Burr,James B., Frequency specific closed loop feedback control of integrated circuits.
  38. Koniaris,Kleanthes G.; Burr,James B., Frequency specific closed loop feedback control of integrated circuits.
  39. Qin, Jinchai (Ivy); Al, Bing, In-circuit test structure for printed circuit board.
  40. Pant, Sanjay; Raja, Tezaswi; Charnas, Andy, Integrated voltage regulator with in-built process, temperature and aging compensation.
  41. Pant, Sanjay; Raja, Tezaswi; Charnas, Andy, Integrated voltage regulator with in-built process, temperature and aging compensation.
  42. Masleid, Robert P, Inverting zipper repeater circuit.
  43. Masleid, Robert P., Inverting zipper repeater circuit.
  44. Masleid, Robert Paul, Inverting zipper repeater circuit.
  45. Fujii, Kiyonaga; Ogawa, Yasushige, Leak current detection circuit, body bias control circuit, semiconductor device, and semiconductor device testing method.
  46. Masleid, Robert, Leakage efficient anti-glitch filter.
  47. Gailhard, Bruno; Joly, Yohan, Method and device for controlling a sample and hold circuit.
  48. Cher, Chen-Yong; Jenkins, Keith A.; Linder, Barry P., On-chip leakage measurement.
  49. Yeric, Gregory Munson, Operating parameter monitor for an integrated circuit.
  50. Myers, James Edward; Flynn, David Walter; Idgunji, Sachin Satish; Yeric, Gregory Munson, Operating parameter monitoring circuit and method.
  51. Masleid, Robert Paul, Power efficient multiplexer.
  52. Masleid, Robert Paul, Power efficient multiplexer.
  53. Masleid, Robert Paul, Power efficient multiplexer.
  54. Masleid, Robert Paul, Power efficient multiplexer.
  55. Chen, Tien-Min, Precise control component for a substarate potential regulation circuit.
  56. Chen, Tien-Min, Precise control component for a substrate potential regulation circuit.
  57. Chen, Tien-Min, Precise control component for a substrate potential regulation circuit.
  58. Masleid, Robert Paul; Dholabhai, Vatsal; Klingner, Christian, Repeater circuit having different operating and reset voltage ranges, and methods thereof.
  59. Masleid, Robert Paul; Dholabhai, Vatsal, Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability.
  60. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
  61. Stoiber, Steven T.; Siu, Stuart, Ring based impedance control of an output driver.
  62. Masleid, Robert Paul; Sousa, Jose; Kottapalli, Venkata, Scannable dynamic circuit latch.
  63. Chen, Tien-Min, Servo loop for well bias voltage source.
  64. Chen, Tien-Min; Fu, Robert, Stabilization component for a substrate potential regulation circuit.
  65. Masleid, Robert P.; Burr, James B., Stacked inverter delay chain.
  66. Swarna, Madhu; Raja, Tezaswi, Supply-voltage control for device power management.
  67. Elkin, Ilyas; Poppe, Wojciech Jakub, System and method for examining asymetric operations.
  68. Suzuki, Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
  69. Suzuki, Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
  70. Suzuki,Shingo, System and method for measuring negative bias thermal instability with a ring oscillator.
  71. Suzuki,Shingo, System and method for measuring time dependent dielectric breakdown with a ring oscillator.
  72. Suzuki,Shingo, System and method for measuring time dependent dielectric breakdown with a ring oscillator.
  73. Suzuki,Shingo; Burr,James, System and method for measuring transistor leakage current with a ring oscillator.
  74. Salmi, Pasi; Pennanen, Juha, System and method for rapidly increasing a rising slew rate of an adjustable supply voltage in adaptive voltage scaling.
  75. Pitkethly, Scott; Masleid, Robert P., Triple latch flip flop system and method.
  76. Pitkethly,Scott; Masleid,Robert P., Triple latch flip flop system and method.
  77. Poppe, Wojciech Jakub; Gupta, Puneet; Elkin, Ilyas, Via resistance analysis systems and methods.
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