[특허]Apparatus and method for determining electrical properties of a semiconductor wafer

Solid State Measurements, Inc.

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Apparatus and method for determining electrical properties of a semiconductor wafer

특허상세정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G01R-031/26
미국특허분류(USC)	324/765; 324/719
출원번호	US-0121130 (2002-04-11)
발명자 / 주소	Howland, William H.
출원인 / 주소	Solid State Measurements, Inc.
대리인 / 주소	The Webb Law Firm
인용정보	피인용 횟수 : 1 인용 특허 : 32

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An apparatus for measuring an electrical property of a semiconductor wafer includes a probe having an electrically conductive tip formed at least in part of a material that is transparent to light and a probe guard disposed adjacent the electrically conductive tip. The apparatus includes a device for selectively applying a first electrical stimulus between a semiconductor wafer and the electrically conductive tip of each probe when it is positioned in spaced relation to the semiconducting material forming the semiconductor wafer, and a device for selectively applying a second electrical stimulus between the semiconductor wafer and the probe guard of each probe. A device for measuring a response of the semiconductor wafer to the electrical stimuli and for determining from the response at least one electrical property thereof is provided. A light source can be positioned to selectively emit light through the transparent material toward the semiconductor wafer.

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1. An apparatus for measuring an electrical property of a semiconductor wafer, the apparatus comprising:at least one probe, each probe having an electrically conductive tip formed at least in part of a material that is transparent to light, a light source positioned to emit light through the transparent material toward the semiconducting material and a probe guard disposed adjacent the electrically conductive tip; means for selectively applying a first electrical stimulus between a semiconducting material of a semiconductor wafer and the electrically conductive tip of each probe when it is positioned in spaced relation to the semiconducting material; means for selectively applying a second electrical stimulus between the semiconducting material and the probe guard of each probe; and means for measuring a response of the semiconducting material to the electrical stimuli applied to each probe and for determining from the response at least one electrical property of the semiconducting material. 2. The apparatus as set forth in claim 1, wherein the measuring means measures the response between the semiconducting material and the electrically conductive tip of each probe.3. The apparatus as set forth in claim 1, wherein:the first electrical stimulus is an AC signal superimposed on a DC signal that is swept from a first, starting value to a second, ending value; and the second electrical stimulus is a DC signal having a constant value. 4. The apparatus as set forth in claim 1, wherein the first electrical stimulus is applied when the electrically conductive tip contacts a dielectric layer overlaying the semiconducting material.5. The apparatus as set forth in claim 1, further including:means for causing the light source of each probe to emit light. 6. The apparatus as set forth in claim 5, further including a switch matrix coupled to a plurality of probes and arranged to (i) apply to the electrically conductive tips of the plurality of probes one at a time the first electrical stimulus, (ii) apply to all of the probe guards of the plurality of probes concurrent with the application of the first electrical stimulus to the electrically conductive tip of each probe the second electrical stimulus, and (iii) cause the light source of each probe to emit light concurrent with at least part of the application of the first electrical stimulus to the electrically conductive tip thereof.7. The apparatus as set forth in claim 5, wherein each probe further includes an opaque portion surrounding the light source for preventing light emission from the light source from propagating toward the semiconducting material except through the transparent material.8. The apparatus as set forth in claim 5, wherein the measuring means also measures a response of the semiconducting material to the light impinging thereon.9. The apparatus as set forth in claim 8, wherein the measuring means measures the response between the semiconducting material and the electrically conductive tip of each probe.10. The apparatus as set forth in claim 1, wherein the probe includes a dielectric layer overlaying the conductive tip.11. The apparatus as set forth in claim 10, wherein the dielectric layer is formed from silicon nitride.12. The apparatus as set forth in claim 10, wherein the electrically conductive tip and the probe guard of each probe are positioned in spaced relation with the surface of a dielectric layer overlaying the semiconducting material.13. The apparatus as set forth in claim 10, wherein each electrically conductive tip is formed from an elastically deformable material.14. A method of measuring an electrical property of a semiconductor wafer comprising the steps of:(a) providing at least one probe, each probe having an electrically conductive tip formed at least in part of a material that is transparent to light, a light source positioned to emit light through the transparent material toward the semiconductor wafer and a probe guard disposed adjacent the electrically conductive tip; (b) moving the electrically conductive tip and the probe guard of each probe into spaced relation with a semiconducting material forming a semiconductor wafer; (c) selectively applying a first electrical stimulus between the semiconducting material and the conductive tip of each probe; (d) selectively applying a second electrical stimulus between the semiconducting material and the probe guard of each probe; and (e) measuring a response of the semiconductor wafer to the electrical stimuli applied to each probe and determining from the response at least one electrical property of the semiconducting material. 15. The method as set forth in claim 14, wherein step (e) includes measuring the response between the semiconducting material and the electrically conductive tip of each probe.16. The method as set forth in claim 14, wherein in step (b) the electrically conductive tip contacts a dielectric layer overlaying the semiconductor material.17. The method as set forth in claim 14, wherein the semiconductor wafer includes a dielectric layer overlaying the semiconducting material.18. The method as set forth in claim 17, wherein:the dielectric layer is formed from (i) silicon dioxide or (ii) a high-k dielectric over silicon dioxide; and during application of the first electrical stimulus thereby, the electrically conductive tip of each probe contacts a surface of the silicon dioxide or the surface of the high-k dielectric facing away from the semiconducting material. 19. The method as set forth in claim 17, wherein the electrically conductive tip and the probe guard of each probe are positioned in spaced relation with the surface of the dielectric layer facing away from the semiconducting material.20. The method as set forth in claim 17, wherein the electrically conductive tip is formed from an elastically deformable material.21. The method as set forth in claim 14, further including the step of:(f) selectively causing the light source of each probe to emit light. 22. The method as set forth in claim 21, wherein:step (c) includes applying the first electrical stimulus to the electrically conductive tip of each of a plurality of probes one at a time; step (d) includes applying the second electrical stimulus to all of the probe guards of the plurality of probes concurrent with the application of the first electrical stimulus to the electrical conductive tip of each probe; and step (f) includes causing the light source of each probe one at a time to emit light concurrent with at least part of the application of the first electrical stimulus to the electrically conductive tip of the probe. 23. The method as set forth in claim 14, wherein the first electrical stimulus is one of a capacitance-voltage (CV) type stimulus and a capacitance-time (Ct) type stimulus.24. The method as set forth in claim 23, wherein:the CV type stimulus and the Ct type stimulus each include superimposing an AC signal on a DC signal that is swept from a first, starting value to a second, ending value; and the sweep of the DC signal for the Ct type stimulus is more rapid than the sweep of the DC signal for the CV type stimulus. 25. The method as set forth in claim 24, wherein, for Ct type stimulus, step (e) includes the steps of:measuring a first capacitance value of the semiconductor wafer when the DC signal initially reaches the second value; maintaining the DC signal at the second value; measuring a time for the capacitance of the semiconductor wafer to change to a second, steady state capacitance value; and determining from the time for the capacitance of semiconductor wafer to change from the first capacitance value to the second capacitance value a generation lifetime of the semiconducting material. 26. The method as set forth in claim 21, wherein:step (e) includes the steps of: measuring a first capacitance value of the semiconductor wafer when each light source emits light; measuring a time for the capacitance of the semiconductor wafer to change to a second, steady state capacitance value after the light from the light source is terminated; and determining from the time for the capacitance of semiconductor wafer to change from the first capacitance value to the second capacitance value a recombination lifetime of the semiconducting material.

이 특허에 인용된 특허 (32)

이 특허를 인용한 특허 (1)

Howland, Jr.,William H.; Hillard,Robert J.; Hung,Steven Chi Shin, Work function controlled probe for measuring properties of a semiconductor wafer and method of use thereof.

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Apparatus and method for determining electrical properties of a semiconductor wafer

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Apparatus and method for determining electrical properties of a semiconductor wafer

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