|국가/구분||United States(US) Patent 등록|
|미국특허분류(USC)||438/459; 438/455; 438/622; 438/652; 438/666; 438/672|
|발명자 / 주소|
|출원인 / 주소|
|인용정보||피인용 횟수 : 52 인용 특허 : 9|
Various methods of forming backside connections on a wafer stack are disclosed. To form the backside connections, vias are formed in a first wafer that is to be bonded with a second wafer. The vias used for the backside connections are formed on a side of the first wafer along with an interconnect structure, and the backside connections are formed on an opposing side of the first wafer using these vias.
1. A method comprising:forming a first interconnect structure on one side of a first wafer; forming a number of vias, each of the vias extending through the first interconnect structure and into the first wafer; depositing an insulating material in each of the number of vias, the insulating material in each via forming an insulating plug; forming a second interconnect structure over the insulating plugs and the first interconnect structure, wherein each of the insulating plugs extends to one of a number of conductors in the second interconnect structure;...