$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B65G-049/07
출원번호 US-0072620 (2002-02-08)
발명자 / 주소
  • Yamagishi, Takayuki
  • Suwada, Masaei
  • Watanabe, Takeshi
출원인 / 주소
  • ASM Japan K.K.
대리인 / 주소
    Knobbe, Martens, Olson &
인용정보 피인용 횟수 : 70  인용 특허 : 95

초록

Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer ch

대표청구항

1. Vacuum load lock semiconductor wafer processing equipment, comprising:a load lock chamber, a transfer chamber, a reaction chamber located above said transfer chamber, and a robot located outside said load lock chamber that includes a wafer transfer arm that is configured to support said semicondu

이 특허에 인용된 특허 (95)

  1. Narayanswami Natraj ; Wagener Thomas J. ; Siefering Kevin L. ; Cavaliere William A., Aerodynamic aerosol chamber.
  2. Nering Eric A., Apparatus and method for automated cassette handling.
  3. Arne W. Ballantine ; Peter A. Emmi ; Walter J. Frey ; Michael J. Gambero ; Neena Garg ; Byeongju Park ; Donald L. Wilson, Apparatus and method for controlling wafer environment between thermal clean and thermal processing.
  4. Kato Susumu,JPX ; Ozawa Masahito,JPX ; Muraoka Sunao,JPX, Apparatus and method for regulating pressure in two chambers.
  5. Lin Zhihong J. ; Wang Chongyang, Apparatus, method and medium for enhancing the throughput of a wafer processing facility using a multi-slot cool down ch.
  6. Tanaka Keiichi,JPX ; Sohma Masaki,JPX ; Asao Shinsuke,JPX ; Ozawa Masahito,JPX, Auxiliary vacuum chamber and vacuum processing unit using same.
  7. Muka Richard S. (Topsfield MA) Pippins Michael W. (Hamilton MA) Drew Mitchell A. (Portsmouth NH), Batchloader for load lock.
  8. Crabb Richard (Mesa AZ) Robinson McDonald (Paradise Valley AZ) Hawkins Mark R. (Mesa AZ) Goodwin Dennis L. (Tempe AZ) Ferro Armand P. (Scottsdale AZ) Ozias Albert E. (Aumsville OR) deBoer Wiebe B. (E, Chemical vapor deposition system.
  9. Muka Richard S. (Topsfield MA) Pippins Michael W. (Hamilton MA) Drew Mitchell A. (Portsmouth NH), Cluster tool batchloader of substrate carrier.
  10. Tepman Avi ; Yin Gerald Zheyao ; Olgado Donald, Compartmentalized substrate processing chamber.
  11. Tepman Avi ; Yin Gerald Zheyao ; Olgado Donald, Compartnetalized substrate processing chamber.
  12. Cannella Vincent D. (Birmingham MI), Continuous dry etching system.
  13. Fishkin Boris (San Jose CA) Sato Seiji (Palo Alto CA) Lowrance Robert B. (Los Gatos CA), Controlled environment enclosure and mechanical interface.
  14. Sasaki Yoshiaki,JPX ; Asakawa Teruo,JPX, Controlling gas in a multichamber processing system.
  15. Tateyama Kiyohisa,JPX, Cooling method, cooling apparatus and treatment apparatus.
  16. Akimoto Masami,JPX, Cooling process system.
  17. Kyogoku Mitsusuke,JPX, Device and method for load locking for semiconductor processing.
  18. Bonora Anthony C. (Menlo Park CA) Oen Joshua T. (Newark CA), Direct loadlock interface.
  19. Muka Richard S. (Topsfield MA), Door drive mechanisms for substrate carrier and load lock.
  20. Salzman Philip M. (San Jose CA), Enclosure for load lock interface.
  21. Salzman Philip M. (San Jose CA), Enclosure for load lock interface.
  22. Brune Robert A. (Austin TX) Smith Dorsey T. (Austin TX) Ray Andrew M. (Austin TX), End station for a parallel beam ion implanter.
  23. Harvey Philip C., Fiber optic receiver.
  24. Tepman Avi, Front end vacuum processing environment.
  25. Martin Jean-Luc,FRX, Gelatinous cushion with reduced membrane effect.
  26. Wytman Joe, High vacuum dual stage load lock and method for loading and unloading wafers using a high vacuum dual stage load lock.
  27. Kyogoku Mitsusuke (Tama JPX), Load lock chamber for vertical type heat treatment apparatus.
  28. Sugino Masao (Tokyo JPX), Loading lock for chemical vapor deposition apparatus.
  29. Canady Mickey Lynn (Rochester MN) Edmonson David Alvoid (Rochester MN) Johnson Gary James (Rochester MN) Teig Paul David (Byron MN) Wall Arthur Carl (Rochester MN), Method and apparatus for coating thin film data storage disks.
  30. Bahng Kenneth J. (Sunnyvale CA), Method and apparatus for cooling wafers.
  31. Hashimoto Tsuyoshi,JPX ; Matsuse Kimihiro,JPX ; Okubo Kazuya,JPX ; Takahashi Tsuyoshi,JPX, Method and apparatus for forming laminated thin films or layers.
  32. Guo Xin Sheng ; Li Shin-Hung ; Lei Lawrence, Method and apparatus for reducing contamination of a substrate in a substrate processing system.
  33. White John M. ; Blonigan Wendell T. ; Richter Michael W., Method of controlling gas flow in a substrate processing system.
  34. Raaijmakers Ivo, Method of cooling wafers.
  35. Ghanayem Steve G. ; Chandrachood Madhavi, Methods and apparatus for reducing particle contamination during wafer transport.
  36. Krueger Gordon P. (San Jose CA), Micro-enviroment load lock.
  37. Bright Nick ; Mooring Ben, Modular architecture for semiconductor wafer fabrication equipment.
  38. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  39. Asakawa Teruo,JPX ; Saeki Hiroaki,JPX, Multi-chamber treatment system.
  40. Sato Junichi (Tokyo JPX) Hasegawa Toshiaki (Kanagawa JPX) Komatsu Hiroshi (Kanagawa JPX), Multi-chamber wafer process equipment having plural, physically communicating transfer means.
  41. Muka Richard S., Multi-level substrate processing apparatus.
  42. Raaijmakers Ivo J., Multi-position load lock chamber.
  43. Maydan Dan ; Somekh Sasson ; Wang David Nin-Kou ; Cheng David ; Toshima Masato ; Harari Isaac ; Hoppe Peter D., Multiple chamber integrated process system.
  44. Kim Do-hyeong,KRX ; Kim Tae-ryong,KRX ; Choi Byeung-wook,KRX ; Jung Kwang-jin,KRX, Multiple reaction chamber system having wafer recognition system and method for processing wafer using same.
  45. Sundar Satish, Optimal trajectory robot motion.
  46. Yano Kensaku (Kanagawa JPX) Furukawa Akihiko (Tokyo JPX) Miyagawa Ryohei (Kanagawa JPX) Iida Yoshinori (Tokyo JPX), Photo chemical reaction apparatus.
  47. Yamazaki Shunpei,JPX ; Takayama Toru,JPX ; Sakama Mitsunori,JPX ; Abe Hisashi,JPX ; Uehara Hiroshi,JPX ; Ishiwata Mika,JPX, Plasma CVD apparatus.
  48. Fujiura Kazuo (Mito JPX) Ohishi Yasutake (Mito JPX) Fujiki Michiya (Mito JPX) Kanamori Terutoshi (Mito JPX) Takahashi Shiro (Mito JPX), Process for the preparation of fluoride glass and process for the preparation of optical fiber preform using the fluorid.
  49. Iwabuchi Katsuhiko (Sagamihara JPX), Processing apparatus.
  50. Takahashi Nobuaki (Hachioji JPX), Processing apparatus with means for rotating an object mounting means and a disk body located in the mounting means diff.
  51. Azumano Hidehito,JPX ; Kinase Atsushi,JPX ; Kogure Kimio,JPX ; Komatsu Hisataka,JPX, Robot apparatus and treating apparatus.
  52. Ozawa Makoto,JPX ; Hirano Mitsuhiro,JPX, Semiconductor manufacturing equipment and method for carrying wafers in said equipment.
  53. Shimizu Akira,JPX ; Hu Peirong,JPX, Semiconductor processing apparatus.
  54. Sato Kiyoshi,JPX, Semiconductor processing system.
  55. Akira Shimizu JP; Mikio Shimizu JP, Semiconductor-manufacturing device.
  56. Tepman Avi (Cupertino CA) Grunes Howard (Santa Cruz CA) Somekh Sasson (Los Altos Hills CA) Maydan Dan (Los Altos Hills CA), Staged-vacuum wafer processing system and method.
  57. Aswad Thomas W., Substrate cooling system and method.
  58. Sato Kiyoshi,JPX ; Shimizu Mikio,JPX ; Mori Yukihiro,JPX, Substrate holding apparatus for processing semiconductors.
  59. Suda Atsuhiko,JPX ; Toyoda Kazuyuki,JPX ; Makiguchi Issei,JPX ; Ozawa Makoto,JPX, Substrate processing apparatus.
  60. Yonemitsu Shuji,JPX ; Karino Toshikazu,JPX ; Yoshida Hisashi,JPX ; Watahiki Shinichiro,JPX ; Yoshida Yuji,JPX ; Shimura Hideo,JPX ; Sugimoto Takeshi,JPX ; Aburatani Yukinori,JPX ; Ikeda Kazuhito,JPX, Substrate processing apparatus.
  61. Sato Yuusuke,JPX ; Ohmine Toshimitsu,JPX ; Honda Takaaki,JPX, Substrate processing apparatus and substrate processing method.
  62. Beaulieu David ; Pippins Michael W., Substrate processing apparatus having a substrate transport with a front end extension and an internal substrate buffer.
  63. Hiroyuki Shinozaki JP, Substrate processing apparatus including a magnetically levitated and rotated substrate holder.
  64. Shuto Mitsutoshi (Tokyo) Fukazawa Yasushi (Tokyo) Ohsaki Minoru (Kumamoto JPX), Substrate supporting apparatus for a CVD apparatus.
  65. Saga, Koichiro, Substrate transfer apparatus and substrate method.
  66. Lakios Emmanuel N. (Port Jefferson Station NY) McGraw Michael F. (East Setauket NY), Substrate transport and cooling apparatus and method for same.
  67. Satoh Kiyoshi,JPX ; Shimizu Mikio,JPX, Substrate-supporting device for semiconductor processing.
  68. Satoh Kiyoshi,JPX, Susceptor for plasma CVD equipment and process for producing the same.
  69. Lee Ke Ling ; Mazur Mikhail ; Lee Ken ; Martinson Robert M., System and method for handling and masking a substrate in a sputter deposition system.
  70. Ohkase Wataru (Sagamihara JPX), Thermal processing apparatus with heat shielding member.
  71. Saito Masaki (Kanagawa JPX), Thermal treatment apparatus, semiconductor device fabrication apparatus, load-lock chamber.
  72. Ohmi Tadahiro (1-17-301 ; Komegabukuro 2-chome ; Aoba-ku Sendai-shi ; Miyagi-ken 980 JPX) Shibata Tadashi (Sendai JPX) Umeda Masaru (Tokyo JPX), Thin film forming equipment.
  73. Ohmi Tadahiro,JPX ; Shibata Tadashi,JPX ; Umeda Masaru,JPX, Thin film forming equipment.
  74. Hiroki, Tsutomu, Transfer apparatus and accommodating apparatus for semiconductor process, and semiconductor processing system.
  75. Takahashi Kiichi,JPX ; Kikuchi Hiroshi,JPX, Transfer apparatus and vertical heat-processing system using the same.
  76. Aggarwal, Ravinder; Kusbel, James F., Transfer chamber with integral loadlock and staging station.
  77. Edwards Richard C., Two-wafer loadlock wafer processing apparatus and loading and unloading method therefor.
  78. Maydan Dan ; Somekh Sasson ; Sinha Ashok ; Fairbairn Kevin ; Lane Christopher ; Colborne Kelly ; Ponnekanti Hari K. ; Taylor W. N.(Nick), Ultra high throughput wafer vacuum processing system.
  79. Wagner Rudolf (Fontnas CHX) Martin Bader (Balzers LIX) Eberhard Moll (Schellenberg LIX) Zanardo Renzo (Balzers LIX) Van Agtmaal J. G. (Hilversum NLX), Vacuum apparatus.
  80. Baecker James J. ; Becker D. Scott ; Foline Michael J. ; Maciej Todd K., Vacuum compatible water vapor and rinse process module.
  81. Muka Richard S., Vacuum integrated SMIF system.
  82. Fukasawa Yoshio (Kofu JPX) Hosoda Shozo (Yamanashi-ken JPX) Nakagome Tatsuya (Yamanashi-ken JPX) Tozawa Takashi (Yamanashi-ken JPX) Suzuki Koji (Yamanashi-ken JPX) Ishihara Yasumasa (Kofu JPX) Aoyagi, Vacuum process apparatus and vacuum processing method.
  83. Kato Susumu (Isawa-Cho JPX) Yamaguchi Hirofumi (Sudama-Cho JPX), Vacuum process apparaus.
  84. Saeki Hiroaki (Yamanashi JPX), Vacuum processing apparatus.
  85. Kato Shigekazu,JPX ; Nishihata Kouji,JPX ; Tsubone Tsunehiko,JPX ; Itou Atsushi,JPX, Vacuum processing apparatus for substate wafers.
  86. Lee Hideki,JPX, Vacuum processing apparatus, vacuum processing method, and method for cleaning the vacuum processing apparatus.
  87. Takanabe Eiichiro (Sagamihara JPX) Suzuki Takeo (Iruma JPX) Noguchi Tadataka (Kitakyushu JPX), Vertical heat-treating apparatus and heat-treating process by using the vertical heat-treating apparatus.
  88. Fuse Noboru (Yokohama JPX) Kitayama Hirofumi (Aikawa JPX) Hattori Hisashi (Tama JPX), Vertical wafer heat treatment apparatus having dual load lock chambers.
  89. Gadgil Prasad N. ; Seidel Thomas E., Vertically-stacked process reactor and cluster tool system for atomic layer deposition.
  90. Kroeker Tony R., Wafer cooling in a transfer chamber of a vacuum processing system.
  91. Goodwin Dennis L. (Tempe AZ) Crabb Richard (Mesa AZ) Robinson McDonald (Paradise Valley AZ) Ferro Armand P. (Scottsdale AZ), Wafer handling system with Bernoulli pick-up.
  92. Flegal ; deceased Christopher (late of New City NY by Gisela H. Flegal ; legal representative), Wafer processing machine vacuum front end method and apparatus.
  93. Binnard, Michael; Hazelton, Andrew J., Wafer stage chamber.
  94. Yamagishi Takayuki,JPX ; Suwada Masaei,JPX ; Furukawara Kazunori,JPX, Wafer transfer mechanism.
  95. Toshima Masato, Wafer transfer system and method of using the same.

이 특허를 인용한 특허 (70)

  1. Ootsuka, Fumio, 3D stacked multilayer semiconductor memory using doped select transistor channel.
  2. Oosterlaken, Theodorus; de Ridder, Chris; Jdira, Lucian, Apparatus and method for manufacturing a semiconductor device.
  3. Kamiya, Tatsuo, Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum.
  4. den Hartog Besselink, Edwin; Garssen, Adriaan; Dirkmaat, Marco, Cassette holder assembly for a substrate cassette and holding member for use in such assembly.
  5. Zaitsu, Masaru; Fukazawa, Atsuki; Fukuda, Hideaki, Continuous process incorporating atomic layer etching.
  6. Raisanen, Petri; Shero, Eric; Haukka, Suvi; Milligan, Robert Brennan; Givens, Michael Eugene, Deposition of metal borides.
  7. Zhu, Chiyu; Shrestha, Kiran; Haukka, Suvi, Deposition of metal borides.
  8. Palm, Joerg; Jost, Stefan; Fuerfanger, Martin; Hartwich, Jessica, Device for forming a reduced chamber space, and method for positioning multilayer bodies.
  9. Nakano, Ryu; Takamure, Noboru; Arai, Hiroki, Film forming apparatus, and method of manufacturing semiconductor device.
  10. Milligan, Robert Brennan, Formation of boron-doped titanium metal films with high work function.
  11. White, Carl L.; Shero, Eric; Reed, Joe, Gap maintenance for opening to process chamber.
  12. Hawkins, Mark; Halleck, Bradley Leonard; Kirschenheiter, Tom; Hossa, Benjamin; Pottebaum, Clay; Miskys, Claudio, Gas distribution system, reactor including the system, and methods of using the same.
  13. Provencher, Timothy J.; Hickson, Craig B., High temperature ALD inlet manifold.
  14. Shugrue, John; Moen, Ron, Lockout tagout for semiconductor vacuum valve.
  15. Jung, Sung-Hoon, Metal oxide protective layer for a semiconductor device.
  16. Pore, Viljami, Method and apparatus for filling a gap.
  17. Pore, Viljami; Knaepen, Werner; Jongbloed, Bert; Pierreux, Dieter; Van Aerde, Steven R. A.; Haukka, Suvi; Fukuzawa, Atsuki; Fukuda, Hideaki, Method and apparatus for filling a gap.
  18. Pore, Viljami; Knaepen, Werner; Jongbloed, Bert; Pierreux, Dieter; Van Der Star, Gido; Suzuki, Toshiya, Method and apparatus for filling a gap.
  19. Reed, Joseph C; Shero, Eric J, Method and apparatus for minimizing contamination in semiconductor processing chamber.
  20. Tolle, John; Hill, Eric; Winkler, Jereld Lee, Method and system for in situ formation of gas-phase compounds.
  21. Jung, Sung-Hoon; Raisanen, Petri; Liu, Eric Jen Cheng; Schmotzer, Mike, Method and system to reduce outgassing in a reaction chamber.
  22. Winkler, Jereld Lee, Method and systems for in-situ formation of intermediate reactive species.
  23. Nakano, Ryu; Inoue, Naoki, Method for controlling in-plane uniformity of substrate processed by plasma-assisted process.
  24. Suemori, Hidemi, Method for depositing dielectric film in trenches by PEALD.
  25. Kang, DongSeok, Method for depositing thin film.
  26. Takamure, Noboru; Okabe, Tatsuhiro, Method for forming Ti-containing film by PEALD using TDMAT or TDEAT.
  27. Shiba, Eiichiro, Method for forming aluminum nitride-based film by PEALD.
  28. Fukazawa, Atsuki, Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition.
  29. Fukazawa, Atsuki; Fukuda, Hideaki; Takamure, Noboru; Zaitsu, Masaru, Method for forming dielectric film in trenches by PEALD using H-containing gas.
  30. Kimura, Yosuke; de Roest, David, Method for forming film having low resistance and shallow junction depth.
  31. Ishikawa, Dai; Fukazawa, Atsuki, Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches.
  32. Namba, Kunitoshi, Method for forming silicon oxide cap layer for solid state diffusion process.
  33. Reed, Joseph C.; Shero, Eric J., Method for minimizing contamination in semiconductor processing chamber.
  34. Shiba, Eiichiro, Method for performing uniform processing in gas system-sharing multiple reaction chambers.
  35. Yamagishi, Takayuki; Suwada, Masaei; Tanaka, Hiroyuki, Method for positioning wafers in multiple wafer transport.
  36. Kato, Richika; Nakano, Ryu, Method for protecting layer by forming hydrocarbon-based extremely thin film.
  37. Kato, Richika; Okuro, Seiji; Namba, Kunitoshi; Nonaka, Yuya; Nakano, Akinori, Method for protecting layer by forming hydrocarbon-based extremely thin film.
  38. Zaitsu, Masaru, Method of atomic layer etching using functional group-containing fluorocarbon.
  39. Zaitsu, Masaru; Kobayashi, Nobuyoshi; Kobayashi, Akiko; Hori, Masaru; Kondo, Hiroki; Tsutsumi, Takayoshi, Method of cyclic dry etching using etchant film.
  40. Knaepen, Werner; Maes, Jan Willem; Jongbloed, Bert; Kachel, Krzysztof Kamil; Pierreux, Dieter; De Roest, David Kurt, Method of forming a structure on a substrate.
  41. Lee, Choong Man; Yoo, Yong Min; Kim, Young Jae; Chun, Seung Ju; Kim, Sun Ja, Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method.
  42. Chun, Seung Ju; Yoo, Yong Min; Choi, Jong Wan; Kim, Young Jae; Kim, Sun Ja; Lim, Wan Gyu; Min, Yoon Ki; Lee, Hae Jin; Yoo, Tae Hee, Method of processing a substrate and a device manufactured by using the method.
  43. Kohen, David; Profijt, Harald Benjamin, Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures.
  44. Raisanen, Petri; Givens, Michael Eugene, Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures.
  45. Margetis, Joe; Tolle, John, Methods of forming highly p-type doped germanium tin films and structures and devices including the films.
  46. Margetis, Joe; Tolle, John, Methods of forming silicon germanium tin films and structures and devices including the films.
  47. Zhu, Chiyu; Asikainen, Timo; Milligan, Robert Brennan, NbMC layers.
  48. Pettinger, Fred; White, Carl; Marquardt, Dave; Ibrani, Sokol; Shero, Eric; Dunn, Todd; Fondurulia, Kyle; Halpin, Mike, Process feed management for semiconductor substrate processing.
  49. Margetis, Joe; Tolle, John; Bartlett, Gregory; Bhargava, Nupur, Process for forming a film on a substrate using multi-port injection assemblies.
  50. Alokozai, Fred; Milligan, Robert Brennan, Process gas management for an inductively-coupled plasma deposition reactor.
  51. Alokozai, Fred; Milligan, Robert Brennan, Process gas management for an inductively-coupled plasma deposition reactor.
  52. Winkler, Jereld Lee, Pulsed remote plasma method and system.
  53. Dunn, Todd; White, Carl; Halpin, Mike; Shero, Eric; Terhorst, Herbert; Winkler, Jerry, Pulsed valve manifold for atomic layer deposition.
  54. Sugiyama, Toru; Nakano, Ryu, Purge step-controlled sequence of processing semiconductor wafers.
  55. Zhu, Chiyu, Selective film deposition method to form air gaps.
  56. Kim, Young Jae; Choi, Seung Woo; Yoo, Yong Min, Semiconductor device and manufacturing method thereof.
  57. Shero, Eric; Verghese, Mohith E.; White, Carl L.; Terhorst, Herbert; Maurice, Dan, Semiconductor processing reactor and components thereof.
  58. Milligan, Robert Brennan; Alokozai, Fred, Semiconductor reaction chamber with plasma capabilities.
  59. Arai, Izumi, Single-and dual-chamber module-attachable wafer-handling chamber.
  60. Xie, Qi; de Roest, David; Woodruff, Jacob; Givens, Michael Eugene; Maes, Jan Willem; Blanquart, Timothee, Source/drain performance through conformal solid state doping.
  61. Weeks, Keith Doran, Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same.
  62. Tolle, John, Structures and devices including germanium-tin films and methods of forming same.
  63. Jeong, Sang Jin; Han, Jeung Hoon; Choi, Young Seok; Park, Ju Hyuk, Susceptor for semiconductor substrate processing apparatus.
  64. Tang, Fu; Givens, Michael Eugene; Xie, Qi; Raisanen, Petri, System and method for gas-phase sulfur passivation of a semiconductor surface.
  65. Lawson, Keith R.; Givens, Michael E., Systems and methods for dynamic semiconductor process scheduling.
  66. Hiroki, Tsutomu, Vacuum processing apparatus and vacuum transfer apparatus.
  67. White, Carl L.; Shero, Eric, Vapor flow control apparatus for atomic layer deposition.
  68. Coomer, Stephen Dale, Variable adjustment for precise matching of multiple chamber cavity housings.
  69. Shugrue, John Kevin, Variable conductance gas distribution apparatus and method.
  70. Schmotzer, Michael; Whaley, Shawn, Variable gap hard stop design.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로