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Method of attaching a heat sink to an IC package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-003/30
출원번호 US-0345929 (2003-01-17)
우선권정보 TW-0106555 (2000-04-08)
발명자 / 주소
  • Chao, Shin-Hua
  • Wu, Shyh-Ing
  • Liao, Kuan-Neng
  • Yeh, Gin-Nan
출원인 / 주소
  • Advanced Semiconductor Engineering, Inc.
대리인 / 주소
    Birch, Stewart, Kolasch &
인용정보 피인용 횟수 : 15  인용 특허 : 20

초록

An improved method of integrally attaching a heat sink to an IC package for enhancing the thermal conductivity of the package. A heat sink matrix, which is dividable into a plurality of individual heat sinks, is attached to an IC package matrix, which is comprised of a plurality of individual IC pac

대표청구항

1. A method of manufacturing a plurality of IC (Integrated Circuit) packages each having an heat sink matrix integrally attached thereon, comprising the steps of:providing a communal substrate; attaching a plurality of semiconductor dies fixedly onto said communal substrate; providing the heat sink

이 특허에 인용된 특허 (20)

  1. Itoh Yoshiaki (Hyogo JPX) Odani Yusuke (Hyogo JPX) Akechi Kiyoaki (Hyogo JPX) Kuroishi Nobuhito (Hyogo JPX), Aluminum-silicon alloy heatsink for semiconductor devices.
  2. Ohsawa Mitsuo (Kanagawa JPX), Electrical circuit apparatus.
  3. Nagl Werner (Munich DT), Flexible lattice-like grid structure etched from a metallic foil.
  4. Olson William L. (Lindenhurst IL) Currier David W. (Algonquin IL) Klosowiak Tomasz L. (Glenview IL) Fulcher Mark (Hanover Park IL), Flexible substrate folded in a U-shape with a rigidizer plate located in the notch of the U-shape.
  5. Baska Douglas A. ; Becker Darryl J. ; Bielick James D. ; Isaacs Phillip D. ; Zumbrunnen Michael L., Heat dissipation apparatus and method for attaching a heat dissipation apparatus to an electronic device.
  6. Wakabayashi Tetsushi (Kawasaki JPX) Honda Norio (Aizuwakamatsu JPX) Sakuma Osamu (Yokohama JPX), Heat sink for a semiconductor device.
  7. Kojima Masayasu (Takarazuka JPX) Hayashi Chihiro (Takarazuka JPX), IC package heat sink fin.
  8. Baudouin Daniel (Missouri City TX) Carpenter Alton (Houston TX) Wallace James (Sugarland TX), Memory card with flexible conductor between substrate and metal cover.
  9. Ross Richard J., Method of assembling integrated circuit package.
  10. Tonti William R. ; Mandelman Jack A. ; Zalesinski Jerzy M. ; Furukawa Toshiharu ; Nguyen Son V. ; Chidambarrao Dureseti, Method of manufacturing an integrated ULSI heatsink.
  11. Nakashima Takashi (Kitakyushu JPX) Takai Keiji (Kitakyushu JPX) Tateishi Kouji (Kitakyushu JPX), Method of producing a frame made of connected semiconductor die mounting substrates.
  12. Khandros Igor Y. ; DiStefano Thomas H., Methods of making semiconductor chip assemblies.
  13. Hoshi Akio (Isesaki JPX) Sato Yukihiro (Maebashi JPX) Koda Toyomasa (Takasaki JPX) Yoshida Isao (Tokyo JPX) Sakamoto Kouzou (Hachioji JPX), Packaged semiconductor device having heat dissipation/electrical connection bumps and method of manufacturing same.
  14. Slattery Kevin T. ; Driemeyer Daniel E., Process of bonding copper and tungsten.
  15. Millard ; Richard J. ; Poat ; David R., Screen printed solid electrolytic capacitor.
  16. Bourdelaise Robert A. (Crofton MD) Harris David B. (Columbia MD) King David R. (Woodlawn MD) Hurst Guy N. (West Carrollton OH), System and method for implementing wiring changes in a solderless printed wiring board module.
  17. Massingill Thomas J. (Scotts Valley CA), Thin cavity down ball grid array package based on wirebond technology.
  18. Beaman Brian S. (Hyde Park NY) Doany Fuad E. (Katonah NY) Fogel Keith E. (Bardonia NY) Hedrick ; Jr. James L. (Oakland CA) Lauro Paul A. (Nanuet NY) Norcott Maurice H. (Valley Cottage NY) Ritsko John, Three dimensional high performance interconnection package.
  19. Burns Carmen D. (Austin TX), Ultra high density integrated circuit packages method and apparatus.
  20. Loo Mike C. (San Jose CA) Conte Alfred S. (Hollister CA), Upgradable multi-chip module.

이 특허를 인용한 특허 (15)

  1. Etzkorn, James, Assembly bonding.
  2. Danello, Paul A.; Stander, Richard A.; Goulet, Michael D., Conduction cooling of multi-channel flip chip based panel array circuits.
  3. Chen, Kuang-Hsiung; Wang, Sheng-Ming; Lee, Yu-Ying; Feng, Hsiang-Ming; Cheng, Bing-Yun, Heat dissipating semiconductor device packages.
  4. Chen, Kuang-Hsiung; Wang, Sheng-Ming; Lee, Yu-Ying; Feng, Hsiang-Ming; Cheng, Bing-Yun, Heat dissipating semiconductor device packages and related methods.
  5. Lange,Bernhard P., Heatsink apparatus and thermally-conductive intermediate material for dissipating heat in semiconductor packages.
  6. Lee, SeongMin; Lee, Tae Keun, Integrated circuit package system with heat slug.
  7. Lee, Seongmin; Lee, Tae Keun, Integrated circuit package system with heat slug.
  8. Kwon, Hyeog Chan, Method for manufacturing wafer scale heat slug system.
  9. Phan, Khoi A.; Rangarajan, Bharath; Singh, Bhanwar, Mitigating heat in an integrated circuit.
  10. Ge, You; Lye, Meng Kong; Mei, Penglin, Semiconductor device with heat spreader.
  11. Ge, You; Lye, Meng Kong; Wang, Zhijie, Semiconductor device with heat-dissipating lead frame.
  12. Ge, You; Lye, Meng Kong; Mei, Penglin, Semiconductor device with integral heat sink.
  13. Tsai, Fu-Yung, Semiconductor packages with heat dissipation structures and related methods.
  14. Lin, I-Chia; Tseng, Yu-Chou; Yang, Jin-Feng; Chung, Chi-Sheng; Liao, Kuo-Hsien, Semiconductor packages with thermal dissipation structures and EMI shielding.
  15. Kwon, Hyeog Chan, Wafer scale heat slug system.
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