$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Interconnects with a dielectric sealant layer

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
  • H01L-023/52
  • H01L-029/40
출원번호 US-0630809 (2003-07-31)
발명자 / 주소
  • Ryan, E. Todd
출원인 / 주소
  • Advanced Micro Devices, Inc.
인용정보 피인용 횟수 : 38  인용 특허 : 8

초록

Leakage, capacitance and reliability degradation of interconnects fabricated in low-k dielectric materials, particularly porous low-k dielectric material, due to penetration by a barrier metal and/or barrier metal precursor during damascene processing is prevented by depositing a conformal, heat sta

대표청구항

1. A semiconductor device comprising:an interlayer dielectric (ILD), comprising a low-k material having a pendant functional group, overlying a lower conductive feature;an opening in the ILD overlying the lower conductive feature, the opening defined by sidewalls of the low-k material;a sealant laye

이 특허에 인용된 특허 (8)

  1. Yoshitake Makoto,JPX ; Onodera Satoshi,JPX, Carbosiloxane dendrimers.
  2. Quek, Shyue Fong; Ang, Ting Cheong; Wong, Yee Chong; Long, Sang Yee, Double-layered low dielectric constant dielectric dual damascene method.
  3. Lee Chung J. ; Wang Hui ; Foggiato Giovanni Antonio, Low dielectric constant materials and method.
  4. Lee, Chung J.; Wang, Hui; Foggiato, Giovanni Antonio, Low dielectric constant materials prepared from photon or plasma assisted chemical vapor deposition and transport polymerization of selected compounds.
  5. Dorsch, Norman; Heinrich, Rudolf; Sommer, Oswin; Oberneder, Stefan; Hechtl, Wolfgang, Organopolysiloxane materials which can be cross-linked by cleaving alcohols into elastomers.
  6. Furusawa, Takeshi; Ryuzaki, Daisuke; Sakuma, Noriyuki; Machida, Shuntaro; Hinode, Kenji; Yoneyama, Ryou, Semiconductor device and process for producing the same.
  7. Takeshi Furusawa JP; Daisuke Ryuzaki JP; Noriyuki Sakuma JP; Shuntaro Machida JP; Kenji Hinode JP; Ryou Yoneyama JP, Semiconductor device and process for producing the same.
  8. Ryuzaki, Daisuke; Furusawa, Takeshi, Semiconductor manufacturing method for low-k insulating film.

이 특허를 인용한 특허 (38)

  1. Ryan, Errol Todd; Zhang, Xunyuan, Barrier layer conformality in copper interconnects.
  2. Phillips, Mark L. F.; Savage, Travis, Compositions of low-K dielectric sols containing nonmetallic catalysts.
  3. Li, Juntao; Wang, Junli; Yang, Chih-Chao, Contact having self-aligned air gap spacers.
  4. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  5. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  6. Yang, Chih-Chao, Geometry control in advanced interconnect structures.
  7. Braeckelmann, Greg; Kawasaki, Hisao; Orlowski, Marius; Petitprez, Emmanuel, Improvements for reducing electromigration effect in an integrated circuit.
  8. Clevenger, Lawrence A.; Quon, Roger A.; Spooner, Terry A.; Wang, Wei; Yang, Chih-Chao, Interconnect structure.
  9. Yang, Chih-Chao, Interconnect structure and fabrication thereof.
  10. Simon, Andrew H.; Yang, Chih-Chao, Interconnect structure and method of forming.
  11. Phillps, Mark L. F.; Thoms, Travis P. S., Low k dielectric.
  12. Ko, Chung-Chi; Chou, Chia-Cheng; Lin, Keng-Chu; Bao, Tien-I; Yu, Chen-Hua, Method for forming self-assembled mono-layer liner for Cu/porous low-k interconnections.
  13. Ko, Chung-Chi; Chou, Chia-Cheng; Lin, Keng-Chu; Bao, Tien-I; Yu, Chen-Hua, Method for forming self-assembled mono-layer liner for cu/porous low-k interconnections.
  14. Whelan, Caroline; Sutcliffe, Victor, Method for selective deposition of a thin self-assembled monolayer.
  15. Whelan,Caroline; Sutcliffe,Victor, Method for selective deposition of a thin self-assembled monolayer.
  16. Liang, Jim Shih-Chun, Method of forming a contact element of a semiconductor device and contact element structure.
  17. Fuller, Nicholas C. M.; Dalton, Timothy J., Method of forming an interconnection structure in a organosilicate glass having a porous layer with higher carbon content located between two lower carbon content non-porous layers.
  18. Yang, Shin-Yi; Lee, Ming-Han; Shue, Shau-Lin; Kuo, Tz-Jun, Method of forming metal interconnection.
  19. Yang, Shin-Yi; Lee, Ming-Han; Shue, Shau-Lin; Kuo, Tz-Jun, Method of forming metal interconnection.
  20. Feustel, Frank; Peters, Carsten; Foltyn, Thomas, Method of selectively forming a conductive barrier layer by ALD.
  21. Fresco, Zachary M.; Lang, Chi-I; Tong, Jinhong; Duong, Anh; Kumar, Nitin; Tsimelzon, Anna; Chiang, Tony, Methods for coating a substrate with an amphiphilic compound.
  22. Oszinda, Thomas; Yim, Tae-Jin; Ahn, Sang-Hoon; Lee, Nae-In, Methods of forming wiring structures and methods of manufacturing semiconductor devices.
  23. Tong, Jinhong, Methods of in-situ vapor phase deposition of self-assembled monolayers as copper adhesion promoters and diffusion barriers.
  24. Lazovsky,David E.; Chiang,Tony P.; Keshavarz,Majid, Molecular self-assembly in substrate processing.
  25. Gates, Stephen M.; Grill, Alfred; Nguyen, Son V.; Nitta, Satyanarayana V., Multi component dielectric layer.
  26. Briggs, Benjamin D.; Clevenger, Lawrence A.; Rizzolo, Michael; Yang, Chih-Chao, Neutral atom beam nitridation for copper interconnect.
  27. Clevenger, Lawrence A.; Quon, Roger A.; Shobha, Hosadurga K.; Spooner, Terry A.; Wang, Wei; Yang, Chi-Chao, Nitridization for semiconductor structures.
  28. Clevenger, Lawrence A.; Quon, Roger A.; Shobha, Hosadurga K.; Spooner, Terry A.; Wang, Wei; Yang, Chih-Chao, Nitridization for semiconductor structures.
  29. Schmidt,Michael; Tempel,Georg, Process for sealing plasma-damaged, porous low-k materials.
  30. Yang, Chih-Chao, Self-formed liner for interconnect structures.
  31. Hoshi, Takeshi; Kiyotoshi, Masahiro, Semiconductor device fabrication method.
  32. Hoshi,Takeshi; Kiyotoshi,Masahiro, Semiconductor device fabrication method.
  33. Tagami, Masayoshi; Ito, Fuminori, Semiconductor device including porous layer covered by poreseal layer.
  34. Fuller,Nicholas C. M.; Dalton,Timothy J., Semiconductor interconnect structure utilizing a porous dielectric material as an etch stop layer between adjacent non-porous dielectric materials.
  35. Ichikawa, Hiroyuki; Kawahara, Hideki; Nakamura, Hiroki, SiC semiconductor device with BPSG insulation film.
  36. Edelstein, Daniel C.; Li, Baozhen; Yang, Chih-Chao, Structure and process for W contacts.
  37. Clevenger, Lawrence A.; Quon, Roger A.; Spooner, Terry A.; Wang, Wei; Yang, Chih-Chao, Surface nitridation in metal interconnects.
  38. Clevenger, Lawrence A.; Quon, Roger A.; Spooner, Terry A.; Wang, Wei; Yang, Chih-Chao, Surface nitridation in metal interconnects.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트