Method and circuit for LCD panel flicker reduction
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0395595
(2003-03-25)
|
우선권정보 |
TW-0112397 (2002-06-07) |
발명자
/ 주소 |
- Chung, Te Cheng
- Lee, Seok Lyul
- Jen, Tean Sen
- Lin, Ming Tien
|
출원인 / 주소 |
- Hannstar Display Corporation
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
7 인용 특허 :
5 |
초록
▼
A method and circuit for LCD panel flicker reduction. The invention relates to an adjustment circuit to reduce an LCD panel flicker, wherein the LCD panel has a plurality of scan lines and a plurality of data lines. In one embodiment, the adjustment circuit includes a variable resistor, and a plural
A method and circuit for LCD panel flicker reduction. The invention relates to an adjustment circuit to reduce an LCD panel flicker, wherein the LCD panel has a plurality of scan lines and a plurality of data lines. In one embodiment, the adjustment circuit includes a variable resistor, and a plurality of impedance adjustment devices, each with impedance and having a control terminal to be coupled with a DC voltage source through the variable resistor, a power terminal to be coupled with a common voltage source, and a scan line terminal to be coupled with a scan line, wherein the impedance of each of the impedance adjustment devices can be varied when the resistance of the variable resistor is varied. Each of the impedance adjustment devices in one embodiment has a transistor. The impedance of each of the impedance adjustment devices is much higher than the impedance of the corresponding scan line to allow the LCD to be operated at higher frequencies.
대표청구항
▼
1. An adjustment circuit for reducing liquid crystal display (LCD) panel flicker for an LCD panel, wherein the LCD panel has a plurality of scan lines and a plurality of data lines, comprising:a variable resistor; and a plurality of impedance adjustment devices, each with impedance and having: a. a
1. An adjustment circuit for reducing liquid crystal display (LCD) panel flicker for an LCD panel, wherein the LCD panel has a plurality of scan lines and a plurality of data lines, comprising:a variable resistor; and a plurality of impedance adjustment devices, each with impedance and having: a. a control terminal to be coupled with a DC voltage source through the variable resistor; b. a power terminal to be coupled with a common voltage source; and c. a scan line terminal to be coupled with a scan line, wherein the impedance of each of the impedance adjustment devices is higher than the impedance of each of the scan lines and is varied when the resistance of the variable resistor is varied. 2. The adjustment circuit of claim 1, wherein each of the impedance adjustment devices comprises a transistor.3. The adjustment circuit of claim 1, wherein the impedance of each of the impedance adjustment devices is much higher than the impedance of the corresponding scan line.4. The adjustment circuit of claim 1, wherein the common voltage source provides a common voltage signal with a voltage level between a high and a low voltage levels.5. An LCD panel, comprising:a plurality of scan lines, each having a first terminal and a second terminal; a plurality of data lines that interlaced to the plurality of scan lines; a plurality of display units disposed in each interlaced scan line and data line; a data driver connected to the data lines; a gate driver connected to first terminals of the scan lines; a variable resistor; and a plurality of impedance adjustment devices, each having a scan line terminal to be connected to a second terminal of a corresponding scan line, a control terminal to be coupled with a DC voltage source through the variable resistor and a power terminal to be coupled with a common voltage source, wherein the impedance of each impedance adjustment device is higher than the impedance of each of the scan lines and is varied when the resistance of the variable resistor is varied. 6. The LCD panel of claim 5, wherein each of the impedance adjustment devices comprises a transistor.7. The LCD panel of claim 5, wherein the impedance of each of the impedance adjustment devices is much higher than the impedance of the corresponding scan line.8. The LCD panel of claim 5, wherein the common voltage source provides a common voltage signal with a voltage level between a high and a low voltage levels.9. A method for LCD panel flicker reduction of an LCD panel, wherein the LCD panel has a plurality of scan lines, each having a first terminal and a second terminal, a plurality of data lines that interlaced to the plurality of scan lines, a plurality of display units disposed in each interlaced scan line and data line, a variable resistor, and a plurality of impedance adjustment devices, each having a scan line terminal to be connected to a second terminal of a corresponding scan line, a control terminal to be coupled with a DC voltage source through the variable resistor and a power terminal to be coupled with a common voltage source, comprising the step of:changing resistance of the variable resistor to vary impedance of at least one impedance adjustment device, wherein each of the impedance adjustment devices is higher than the impedance of each of the scan lines to reduce the panel flicker. 10. The adjustment circuit of claim 9, wherein each of the impedance adjustment devices comprises a transistor.11. The adjustment circuit of claim 9, wherein the impedance of each of the impedance adjustment devices is much higher than the impedance of the corresponding scan line.12. The adjustment circuit of claim 9, wherein the common voltage source provides a common voltage signal with a voltage level between a high and a low voltage levels.
이 특허에 인용된 특허 (5)
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Mikami, Yoshiro; Satou, Hideo; Kageyama, Hiroshi; Aono, Yoshinori, High-definition liquid crystal display including sub scan circuit which separately controls plural pixels connected to the same main scan wiring line and the same sub scan wiring line.
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Kudo, Yasuyuki; Furuhashi, Tsutomu; Miyazawa, Toshio; Mikami, Yoshiro; Akimoto, Hajime; Manba, Norio, Liquid crystal display apparatus and liquid crystal display driving method.
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Nonomura Keisaku (Nara JPX) Funada Fumiaki (Yamatokoriyama JPX) Matsuura Masataka (Tenri JPX), Liquid crystal display device and method for driving thereof.
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Koyama Jun,JPX ; Yamazaki Shunpei,JPX, Matrix type liquid-crystal display unit.
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Yamaguchi Hisashi (Atsugi JPX) Kaneko Yoshiya (Tokyo JPX) Haraguchi Munehiro (Hadano JPX) Murakami Hiroshi (Atsugi JPX) Hoshiya Takayuki (Atsugi JPX) Kobayashi Tetsuya (Sagamihara JPX) Takahara Kazuh, Method and apparatus for driving a liquid crystal display panel.
이 특허를 인용한 특허 (7)
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Cho, Se-Hyoung; Kim, Il-Gon; Jung, Mee-Hye; Hwang, In-Jae, Display panel and display apparatus having the same.
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Werner, Ralph A., Image stability in liquid crystal displays.
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Werner, Ralph A., Image stability in liquid crystal displays.
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Oh, Kwan-Young; Lee, Seung-Woo; Oh, Jae-Ho, Method of extracting optimized digital variable resistor value and system using the same.
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Brundula, Steven N. D.; Nerheim, Magne H., Systems and methods for immobilization using a compliance signal group.
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Smith, Patrick W, Systems and methods for immobilization using pulse series.
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Satoh,Yasuo, Variable resistance logic.
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