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A method of making an optoelectronic semiconductor package device includes attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, and the upper surface includes a light sensitive cell and a conductive pad, th

A method of making an optoelectronic semiconductor package device includes attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, and the upper surface includes a light sensitive cell and a conductive pad, then forming an encapsulant that covers the lower surface, and then forming a connection joint that contacts and electrically connects the conductive trace and the pad.

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1. A method of making an optoelectronic semiconductor package device, comprising:attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, and the upper surface includes a light sensitive cell and a conductive p

1. A method of making an optoelectronic semiconductor package device, comprising:attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, and the upper surface includes a light sensitive cell and a conductive pad; then forming an encapsulant that covers the lower surface, wherein the encapsulant includes a peripheral ledge, and the transparent adhesive is located within and recessed relative to the peripheral ledge; and then forming a connection joint that contacts and electrically connects the conductive trace and the pad. 2. The method of claim 1, wherein the conductive trace extends through a peripheral side surface of the encapsulant.3. The method of claim 1, wherein the transparent adhesive contacts the light sensitive cell.4. The method of claim 1, wherein the transparent adhesive contacts the pad.5. The method of claim 1, wherein the transparent adhesive contacts the conductive trace.6. The method of claim 1, wherein the encapsulant contacts the lower surface.7. The method of claim 1, wherein the encapsulant contacts four outer side surfaces of the chip.8. The method of claim 1, wherein the encapsulant is formed by transfer molding.9. The method of claim 1, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.10. The method of claim 1, wherein the device is devoid of wire bonds, TAB leads and solder joints.11. A method of making an optoelectronic semiconductor package device, comprising:attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, and the transparent adhesive contacts the conductive trace and the upper surface and is spaced from the lower surface; then forming an encapsulant that contacts the conductive trace and the lower surface, wherein the encapsulant includes a peripheral ledge, and the transparent adhesive is located within and recessed relative to the peripheral ledge; and then forming a connection joint that contacts and electrically connects the conductive trace and the pad. 12. The method of claim 11, wherein the conductive trace extends through a peripheral side surface of the encapsulant.13. The method of claim 11, wherein the transparent adhesive contacts the light sensitive cell.14. The method of claim 11, wherein the transparent adhesive contacts the pad before forming the connection joint.15. The method of claim 11, wherein the transparent adhesive contacts the pad after forming the connection joint.16. The method of claim 11, wherein the encapsulant contacts four outer side surfaces of the chip and is non-transparent.17. The method of claim 11, wherein the encapsulant contacts the transparent adhesive.18. The method of claim 11, wherein the encapsulant is formed by transfer molding.19. The method of claim 11, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.20. The method of claim 11, wherein the device is devoid of wire bonds, TAB leads and solder joints.21. A method of making an optoelectronic semiconductor package device, comprising:attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, and the upper surface includes a light sensitive cell and a conductive pad; then forming an encapsulant that covers the lower surface, wherein the encapsulant includes a peripheral ledge outside a periphery of the chip, the transparent adhesive is located within and recessed relative to the peripheral ledge, and the conductive trace extends through an opening in the encapsulant; and then forming a connection joint that contacts and electrically connects the conductive trace and the pad. 22. The method of claim 21, wherein the conductive trace extends through a peripheral side surface of the encapsulant.23. The method of claim 21, wherein the transparent adhesive contacts the light sensitive cell.24. The method of claim 21, wherein the transparent adhesive contacts the pad.25. The method of claim 21, wherein the transparent adhesive contacts the conductive trace.26. The method of claim 21, wherein the encapsulant contacts the lower surface.27. The method of claim 21, wherein the encapsulant contacts four outer side surfaces of the chip.28. The method of claim 21, wherein the encapsulant is formed by transfer molding.29. The method of claim 21, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.30. The method of claim 21, wherein the device is devoid of wire bonds, TAB leads and solder joints.31. A method of making an optoelectronic semiconductor package device, comprising:attaching a conductive trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, and the transparent adhesive contacts the conductive trace and the upper surface and is spaced from the lower surface; then forming an encapsulant that contacts the conductive trace and the lower surface, wherein the encapsulant includes a peripheral ledge outside a periphery of the chip, the transparent adhesive is located within and recessed relative to the peripheral ledge, and the conductive trace extends through an opening in the encapsulant; and then forming a connection joint that contacts and electrically connects the conductive trace and the pad. 32. The method of claim 31, wherein the conductive trace extends through a peripheral side surface of the encapsulant.33. The method of claim 31, wherein the transparent adhesive contacts the light sensitive cell.34. The method of claim 31, wherein the transparent adhesive contacts the pad before forming the connection joint.35. The method of claim 31, wherein the transparent adhesive contacts the pad after forming the connection joint.36. The method of claim 31, wherein the encapsulant contacts four outer side surfaces of the chip and is non-transparent.37. The method of claim 31, wherein the encapsulant contacts the transparent adhesive.38. The method of claim 31, wherein the encapsulant is formed by transfer molding.39. The method of claim 31, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.40. The method of claim 31, wherein the device is devoid of wire bonds, TAB leads and solder joints.41. A method of making an optoelectronic semiconductor package device, comprising:depositing a metal trace on a metal base; then attaching the metal base and the metal trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the metal base covers the upper surface, the transparent adhesive contacts the metal base, the metal trace and the upper surface and is spaced from the lower surface, the transparent adhesive is located between the metal base and the upper surface and between the metal trace and the upper surface, and the metal trace is located between the metal base and the transparent adhesive; then forming an encapsulant that covers the lower surface; then etching the metal base, thereby removing a portion of the metal base that overlaps the pad and exposing the transparent adhesive; and then forming a connection joint that contacts and electrically connects the metal trace and the pad. 42. The method of claim 41, wherein the metal trace is electroplated on the metal base.43. The method of claim 41, wherein the transparent adhesive contacts the light sensitive cell.44. The method of claim 41, wherein the transparent adhesive contacts the pad.45. The method of claim 41, wherein the transparent adhesive contacts the metal trace.46. The method of claim 41, wherein the encapsulant contacts the lower surface.47. The method of claim 41, wherein the encapsulant contacts four outer side surfaces of the chip.48. The method of claim 41, wherein the encapsulant includes a peripheral ledge, and the transparent adhesive is located within and recessed relative to the peripheral ledge.49. The method of claim 41, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.50. The method of claim 41, wherein the device is devoid of wire bonds, TAB leads and solder joints.51. A method of making an optoelectronic semiconductor package device, comprising:depositing a metal trace on a metal base; then attaching the metal base and the metal trace to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the metal base covers the upper surface, the transparent adhesive contacts the metal base, the metal trace and the upper surface and is spaced from the lower surface, the transparent adhesive is located between the metal base and the upper surface and between the metal trace and the upper surface, and the metal trace is located between the metal base and the transparent adhesive and extends within and outside a periphery of the chip and overlaps the pad; then forming an encapsulant that contacts the metal trace and the lower surface; then etching the metal base, thereby removing a portion of the metal base that overlaps the pad and exposing the transparent adhesive; then forming an opening that extends through the transparent adhesive and exposes the pad; and then forming a connection joint that contacts and electrically connects the metal trace and the pad. 52. The method of claim 51, wherein the metal trace is electroplated on the metal base.53. The method of claim 51, wherein the transparent adhesive contacts the light sensitive cell.54. The method of claim 51, wherein the transparent adhesive contacts the pad before forming the connection joint.55. The method of claim 51, wherein the transparent adhesive contacts the pad after forming the connection joint.56. The method of claim 51, wherein the encapsulant contacts four outer side surfaces of the chip and is non-transparent.57. The method of claim 51, wherein the encapsulant contacts the transparent adhesive.58. The method of claim 51, wherein the encapsulant includes a peripheral ledge, and the transparent adhesive is located within and recessed relative to the peripheral ledge.59. The method of claim 51, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.60. The method of claim 51, wherein the device is devoid of wire bonds, TAB leads and solder joints.61. A method of making an optoelectronic semiconductor package device, comprising:providing a metal base that includes first and second opposing surfaces, wherein the metal base further includes a pair of slots that extend between the first and second surfaces, and a lead between the slots; depositing a metal trace on the first surface of the metal base, wherein the metal trace contacts the lead; attaching the metal base to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the first surface faces towards the chip, the second surface faces away from the chip, and the transparent adhesive contacts the light sensitive cell; then forming an encapsulant that covers the lower surface and extends into the slots; etching the metal base, thereby exposing the transparent adhesive; and then forming a connection joint that contacts and electrically connects the metal trace and the pad. 62. The method of claim 61, wherein forming the slots includes etching the metal base.63. The method of claim 61, wherein forming the slots includes:forming a first etch mask on the first surface that includes openings that selectively expose the first surface; forming a second etch mask on the second surface that includes openings that selectively expose the second surface; applying a wet chemical etch through the openings in the first etch mask to selectively etch the first surface, thereby partially forming the slots; applying a wet chemical etch through the openings in the second etch mask to selectively etch the second surface, thereby partially forming the slots; removing the first etch mask; and removing the second etch mask. 64. The method of claim 61, wherein depositing the metal trace includes:forming a plating mask on the first surface that includes an opening that selectively exposes the first surface; and electroplating the metal trace in the opening and on the exposed portion of the first surface. 65. The method of claim 61, wherein etching the metal base removes a portion of the metal base that overlaps the pad.66. The method of claim 61, wherein etching the metal base removes a portion of the metal base that overlaps the chip.67. The method of claim 61, wherein etching the metal base includes:depositing a protective coating on a portion of the lead that protrudes laterally from the encapsulant; and then applying a wet chemical etch that is selective of the metal base with respect to the protective coating. 68. The method of claim 61, including forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint.69. The method of claim 61, wherein the steps are performed in the sequence set forth.70. The method of claim 61, wherein the device is devoid of wire bonds, TAB leads and solder joints.71. A method of making an optoelectronic semiconductor package device, comprising:providing a metal base that includes first and second opposing surfaces; etching the metal base to form a pair of slots that extend between the first and second surfaces, wherein the metal base forms a lead between the slots; depositing a metal trace on the first surface of the metal base, wherein the metal trace contacts the lead; attaching the metal base to a semiconductor chip using a transparent adhesive, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the first surface faces towards the chip, the second surface faces away from the chip, and the transparent adhesive contacts the light sensitive cell; then forming an encapsulant that contacts the lower surface and fills the slots; removing the encapsulant from a region of the slots, wherein the lead protrudes laterally from and extends through the encapsulant; etching the metal base, thereby exposing the transparent adhesive; forming an opening in the transparent adhesive, thereby exposing the pad; forming a connection joint that contacts and electrically connects the metal trace and the pad; and forming a transparent base that contacts the transparent adhesive, the encapsulant and the connection joint, wherein the encapsulant and the transparent base form an insulative housing that surrounds the chip. 72. The method of claim 71, wherein etching the metal base to form the slots includes:forming a first etch mask on the first surface that includes openings that selectively expose the first surface; forming a second etch mask on the second surface that includes openings that selectively expose the second surface; applying a wet chemical etch through the openings in the first etch mask to selectively etch the first surface, thereby partially forming the slots; applying a wet chemical etch through the openings in the second etch mask to selectively etch the second surface, thereby partially forming the slots; removing the first etch mask; and removing the second etch mask. 73. The method of claim 71, wherein depositing the metal trace includes:forming a plating mask on the first surface that includes an opening that selectively exposes the first surface; and electroplating the metal trace in the opening in the plating mask and on the exposed portion of the first surface. 74. The method of claim 71, wherein etching the metal base to expose the transparent adhesive removes a portion of the metal base that overlaps the pad.75. The method of claim 71, wherein etching the metal base to expose the transparent adhesive removes a portion of the metal base that overlaps the chip.76. The method of claim 71, wherein etching the metal base to expose the transparent adhesive includes:depositing a protective coating on a portion of the lead that protrudes laterally from the encapsulant; and then applying a wet chemical etch that is selective of the metal base with respect to the protective coating. 77. The method of claim 71, wherein the encapsulant includes a peripheral ledge, and the transparent adhesive is located within and recessed relative to the peripheral ledge.78. The method of claim 71, wherein the encapsulant includes a peripheral ledge, and the transparent base is located within and recessed relative to the peripheral ledge.79. The method of claim 71, wherein the steps are performed in the sequence set forth.80. The method of claim 71, wherein the device is devoid of wire bonds, TAB leads and solder joints.