Synchronizing clocks across a communication link
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H04J-003/06
H04Q-007/00
H04L-012/28
H04B-001/38
G06F-015/16
출원번호
US-0790443
(2001-02-21)
발명자
/ 주소
Sinha, Pranesh
Akler, Sharon
Bourlas, Yair
Gallagher, Timothy Leo
Gilbert, Sheldon L.
Pollmann, Stephen C.
Price, Frederick W.
Readler, Blaine C.
Wiss, John
Arviv, Ell
출원인 / 주소
Wi-Lan, Inc.
대리인 / 주소
Procopio, Cory, Hargreaves &
인용정보
피인용 횟수 :
43인용 특허 :
29
초록▼
Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal patte
Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.
대표청구항▼
1. An apparatus for synchronizing a slave clock at a receiving end of a communication link to a master clock at a transmitting end of the communication link, comprising:master apparatus at the first end of the communication link including storage configured to retain a known data pattern, a sequence
1. An apparatus for synchronizing a slave clock at a receiving end of a communication link to a master clock at a transmitting end of the communication link, comprising:master apparatus at the first end of the communication link including storage configured to retain a known data pattern, a sequencer configured to dispose the known data pattern as part of data for transmission to the receiving end of the communication link, a timer including a counter configured to produce an output based on counting a known number of master clock cycles as an interval between transmissions of the known data pattern, a transmitter configured to transmit, responsive to the timer counter output, a synchronization signal reflecting the known data pattern from the sequencer at intervals indicated by the timer; and slave apparatus at the receiving end of the communication link including a receiver configured to receive the transmitted synchronization signal, storage configured to retain a data pattern comparable to the received synchronization signal, a controllable slave clock oscillator having a variable slave clock rate, correlator apparatus configured to identify a synchronization time at which the received synchronization signal arrives in terms defined with respect to periods of a sample clock having a rate which is n times the slave clock rate, the correlator apparatus including a correlation digital signal generator configured to generate digital correlation signal samples at the sample clock rate, a digital correlation sample local maximum indicating the sample closest to when the synchronization signal and the stored comparable data pattern match, a correlation peak interpolator of the digital correlation signal, the correlation peak interpolator output indicating the synchronization time to an interpolator resolution less then 1/n of a slave clock period, a slave clock expected time generator configured to indicate an expected time when the synchronization signal will be received if the slave clock is synchronized to the master dock, a slave clock error generator configured to generate a slave clock error signal based on a difference between the expected time for the synchronization signal and the received synchronization signal time indicated by the correlator apparatus, and an error filter configured to output a filtered slave clock error to the slave clock controllable oscillator to adjust the slave clock rate. 2. The apparatus of claim 1, wherein the slave clock error generator includes an integrator configured to sum substantially all slave clock errors, at least at a slave clock period resolution.3. The apparatus of claim 1, wherein the correlation peak interpolator includes a plurality of fibers, each filter configured to act upon the digital correlation signal near the correlation peak value, each filter representing a unique sample-time offset of less than 1/n period from an adjacent filter.4. The apparatus of claim 3, wherein in operation each of the plurality of correlation peak interpolator filters simultaneously has a distinct output value.5. The apparatus of claim 3 wherein each filter is a finite impulse response digital filter summing a product of 5 successive digital correlation signal samples each times one of 5 unique coefficients, and the interpolator resolution is about 1(n*4) slave clock periods.6. The apparatus of claim 1, wherein the communication link is a wireless communication link in half-duplex operation.7. The apparatus of claim 6, wherein the half-duplex operation employs adaptive time division duplexing.8. The apparatus of claim 7, wherein the communication system includes a base station communicating across a plurality of links in each of a plurality of geographically restricted sectors, the base station including a transmitter for each particular sector, wherein each transmitter transmits a synchronizing signal simultaneously across each of the plurality of links within the particular sector.9. The apparatus of claim 1, further including an interpolation estimator having correlation peak interpolator outputs as inputs, the interpolator estimator configured to output an estimation of the synchronization time location between the correlation peak interpolator outputs to a resolution smaller than the interpolator resolution.10. The apparatus of claim 9, wherein the slave clock error generator includes an integrator which sums substantially all slave clock errors to at least a slave clock period resolution.11. A millimeter-wave wireless communication system including the apparatus for synchronizing clocks across a link of claim 1, the communication system further comprisinga base station configured to communicate to a multiplicity of CPEs across a plurality of links in each of a plurality of geographically restricted sectors, the base station including a transmitter for each particular sector configured to use an adaptive time division duplexing protocol, wherein each transmitter periodically simultaneously transmits a synchronizing signal across each of the plurality of links to a plurality of CPEs within the particular sector. 12. Receiver apparatus for use in a time division duplex communication system which synchronizes a variable frequency slave clock to a received synchronization signal, the receiver apparatus comprising:storage for an expected synchronization signal and for an expected synchronization interval; a controllable slave clock oscillator having a variable slave clock rate; correlator apparatus which identifies a synchronization time at which the received synchronization signal arrives in terms defined with respect to periods of a sample clock having a rate which is n times the slave clock rate, the correlator apparatus including a correlation digital signal generator which generates digital correlation signal samples at the sample clock rate, a digital correlation sample local extrema indicating the sample closest to when the synchronization signal and the stored comparable data pattern match, and a correlation peak interpolator of the digital correlation signal, the correlation peak interpolator output indicating the synchronization time to an interpolator resolution less than 1/n of a slave clock period; a slave clock expected-time generator to indicate an expected time when the synchronization signal will be received if the slave clock is synchronized to the synchronization signal; a slave clock error generator to generate a slave clock error signal based on a difference between the expected time for the synchronization signal and the received synchronization signal time indicated by the correlator apparatus; and an error filter which outputs a filtered slave clock error to the controllable slave clock oscillator to adjust the slave clock rate. 13. The apparatus of claim 12, wherein the slave clock error generator includes an integrator which sums substantially all slave clock errors, at least at a slave clock period resolution.14. The apparatus of claim 12, wherein the correlation peak interpolator includes a plurality of filters, each filter acting upon the digital correlation signal near the correlation peak value, each alter representing a unique sample-time offset of less than 1/n period from an adjacent filter.15. The apparatus of claim 14 wherein each of the plurality of correlation peak interpolator filters simultaneously has a distinct output value.16. The apparatus of claim 12, further including an interpolation estimator havingan input which receives correlation peak interpolator outputs, a reinterpolator which approximates the received synchronization time between adjacent interpolator outputs to a resolution smaller than the interpolator resolution. 17. The apparatus of claim 16, wherein the slave clock error generator includes an integrator which sums substantially all slave clock errors to at least a slave clock period resolution.18. A method of synchronization a receiver slave clock to a transmitter master clock across a communication link, comprising:preparing one or more synchronization data patterns at the transmitter end of the communication link; determining synchronizing intervals of time, in terms of master clock periods, by which to separate synchronization transmissions, making the synchronization transmission intervals and the synchronization data patterns known at the receiver as expected synchronization signals and expected synchronization intervals; transmitting synchronization signals reflecting the synchronization data patterns at the synchronizing intervals from the transmitter to the receiver; providing a controllable slave clock variable frequency oscillator; correlating received signals with a data signal comparable to the synchronization signal expected by the receiver to determine a synchronization receipt time, the correlation including generating a correlation digital sequence reflecting correlation between the received signal and the comparable data signal at a sample rate of n times the slave clock; identifying a best correlation sample of the correlation digital sequence reflecting a best correlation, and a best correlation portion of the correlation digital sequence about the best correlation sample, thereby identifying the synchronization receipt time to the 1/n slave clock resolution of the sample; passing the best correlation portion to and interpolator; and interpolating the best correlation portion to produce interpolation outputs reflecting the synchronization receipt time to an interpolation resolution which is less than 1/n slave clock periods; selecting an interpolation output indicating a location of the synchronization receipt time between to the interpolation resolution; determining at the receiver an expected synchronization receipt time based on an expected number of slave clock periods in the synchronization interval; determining a slave clock error by comparing the synchronization receipt time with the expected synchronization receipt time; and providing a filtered slave clock error input to control the slave variable frequency oscillator. 19. The method of claim 18 wherein the interpolation outputs are a plurality of distinct outputs each reflecting an interpolation of the synchronization receipt time by about an interpolation resolution amount different from an adjacent interpolation output, the correlation further including:comparing the interpolation outputs to estimate the synchronization receipt time to within less than interpolation resolution. 20. The method of claim 19 including comparing values of interpolation outputs adjacent either side of the interpolation output reflecting the best correlation at correlator resolution in order to estimate the best correlation at less than correlator resolution.21. The method of claim 18 including summing substantially all of the slave clock error at least at slave clock period resolution such that an average phase of the slave clock is locked to an average phase of the master clock.22. The method of claim 18 wherein interpolating the best correlation portion includes passing the best correlation portion through a plurality of filters each having a sequence of coefficients.23. The method of claim 22 wherein interpolating the best correlation portion includes processing the best correlation portion by all interpolation filters in parallel, and determining the best correlation interpolation by comparing the values of all interpolators from the same moment.24. The method of claim 18 wherein the communication link communicates data in a framed adaptive time division multiplexing format.25. The method of claim 24 further including transmitting synchronizing information to the receiver for less than 1/1000 of communication symbol time.26. A method for transmitters in a millimeter wave wireless communication system using adaptive time division duplexing to permit a receiver slave clock to be synchronized to a transmitter master clock in accordance with the method of claim 18, the method comprising:determining synchronization signal transmit times by causing intervals between synchronization signals to be a predetermined number of master clock periods; transmitting synchronization signals reflecting predetermined synchronization data at the synchronization signal transmit times. 27. Apparatus for a transmitter in a time division duplex communication system to provide synchronization signals to enable a receiver to synchronize a receiver clock to a transmitter clock in accordance with the method of claim 18.28. A method of synchronizing clocks across a communication link for conveying information between a first side and a second side opposite the first side, the method comprising:establishing a master clock on a master side of the link; providing a slave clock on a slave side of the link opposite the master side; providing a first noncommon clock on the first side of the link; providing, on the second side of the link, a second noncommon clock having a frequency which is independent of the first noncommon clock; transmitting a periodic synchronization signal from the first side of the link to be received on the second side of the link; adjusting the frequency of the second noncommon clock on the basis of a difference between a characteristic of the received synchronization signal and an expected characteristic of the synchronization signal to synchronize the second noncommon clock to the first noncommon clock; and thereafter, determining a master relationship between the master clock and the noncommon clock on the same side of the link as the master clock including comparing the master clock and the noncommon clock; communicating the determined master relationship to the opposite slave side of the link; determining a slave relationship between the slave clock and the noncommon clock on the same side of the link as the slave clock including comparing the slave clock and the noncommon clock; and adjusting the slave clock to cause the slave relationship to substantially become a known function of the master relationship such that the slave clock is synchronized with the master clock. 29. The method of synchronizing clocks of claim 28 including adjusting the slave clock to cause the slave relationship to become substantially the same as the master relationship.30. The method of synchronizing clocks of claim 28 wherein the expected characteristic of the synchronization signal is the time of arrival of the synchronization signal as measured according to the second noncommon clock.31. The method of synchronizing clocks of claim 30 wherein the step of synchronizing the first and second noncommon clocks includes phase locking the noncommon clocks.32. The method of synchronizing clocks of claim 28 wherein the difference between the time of arrival of the synchronizing signal and the expected time of arrival based on the second noncommon clock is measured to at least a resolution of one eighth noncommon clock period.33. The method of synchronizing clocks of claim 28 wherein each synchronization signal is transmitted a number, known to the receiver, of noncommon clock cycles after the previous synchronization signal such that the number of noncommon clock cycles between synchronization signals is known to the receiver.34. The method of synchronizing clocks of claim 28 wherein each noncommon clock is derived from a symbol clock used in the modulation and demodulation of symbols communicated across the communication link.35. The method of synchronizing clocks of claim 28 wherein the master clock reflects an incoming rate of constant bit-rate data.36. The method of synchronizing clocks of claim 28 wherein the master relationship between the master clock and the noncommon clock on the same side of the link as the master clock is a number of edges of one of the clocks falling in a period of time defined by a known number of cycles of the other clock.37. The method of synchronizing clocks of claim 36 wherein the one of the clocks is the noncommon clock on the master side, and the other clock is the master clock, and the known number of cycles of the master clock require a period of between 10 ms and 100 ms.38. The method of synchronizing clocks of claim 36 wherein the step of communicating the master relationship across the link includes sending a number representing the number of edges falling in the defined period of time is performed about once per the defined period of time, and wherein the number thus sent has less than the number of bits required to explicitly convey the number of edges but at least as many bits as are necessary to unambiguously determine the number of edges based upon a previously established expectation of the range within which the number of edges will fall.39. A method in a communication system of adjusting a rate of delivering data which has been received at a station from a different station across a communication link, the method comprising:providing a noncommon clock at the station; taking steps to synchronize the noncommon clock with a corresponding clock presumed to be operating at the different station, the steps including sending synchronization signals which reflect a time period defined by the noncommon clock, receiving synchronization signals and adjusting the noncommon clock frequency to reflect a timing between the received synchronization signals; providing a data rate clock at the station to control the rate of delivering the received data; determining a relationship between the data rate clock and the noncommon clock; comparing the determined relationship to particular data received across the link and presumed to indicate a corresponding relationship between clocks at the different station; and adjusting a frequency of the data rate clock on the basis of a difference between the determined relationship of the clocks at the station and the corresponding relationship presumably indicated by the particular received data. 40. A method in a communication system local station of providing information sufficient to permit synchronization of a remote data rate clock to a data rate clock available at the local station, the method comprising:providing a local noncommon clock at the local station; taking steps to synchronize the noncommon clock with a corresponding clock presumed to be operating at the remote station, the steps including sending synchronization signals which reflect a time period defined by the local noncommon clock, receiving synchronization signals and adjusting a frequency of the local noncommon clock to reflect a timing between the received synchronization signals; periodically determining a relationship between the local data rate clock and the local noncommon clock, including counting a number of cycles of one of the local clocks which fall within a time period defined by a predetermined number of cycles of another of the local clocks; and periodically transmitting data reflecting the relationship between the local data rate clock and the local noncommon clock to the remote station. 41. A system for synchronizing a plurality of independent clocks across a communication link, comprising:a first noncommon clock module configured to provide reference timing for transmission of a noncommon clock synchronization signal across the communication link according to a first noncommon clock; a second noncommon clock module configured to adjust a second noncommon clock in response to the received noncommon clock synchronization signal for synchronizing the second noncommon clock to the first noncommon clock; a master-side communication station including the first noncommon clock module, and further including: a master-side modem module configured to transmit data to a slave-side communication station, and a master secondary clock module configured to provide a master secondary clock, determine a master timing relationship between the master secondary clock and the noncommon clock of the master-side station, and provide data reflecting the master timing relationship to the master-side modem module for transmission to the slave-side communication station; and the slave-side communication station, including the second noncommon clock module and further including: a slave-side modem module configured to receive the data reflecting the master timing relationship from the master-side communication station, and a slave secondary clock module configured to provide a slave secondary clock, determine a slave timing relationship between the slave secondary clock and the noncommon clock of the slave-side station, and adjust a frequency of the slave secondary clock on the basis of a difference between the determined slave timing relationship and the received data reflecting the master timing relationship.
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