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A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energ

A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

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1. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the steps of:a first step, performed at least partially by atomic layer deposition, of depositing a barrier layer comprising tantalum on sid

1. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the steps of:a first step, performed at least partially by atomic layer deposition, of depositing a barrier layer comprising tantalum on sides of said hole; a second step of etching said barrier layer at a bottom of said hole selectively to said barrier layer on said sides of said hole; a subsequent third step, performed by physical vapor deposition, of depositing a copper seed layer over said barrier layer; and filling by electrochemical plating copper into said hole over said copper seed layer. 2. The process of claim 1, wherein said barrier layer comprises tantalum nitride.3. The process of claim 1, wherein said etching is performed with energetic ions.4. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the steps of:a first step, performed at least partially by atomic layer deposition, of depositing a barrier layer comprising tantalum on sides of said hole; a subsequent second step of etching said barrier layer at the bottom of the hole, wherein second step includes generating an argon plasma and biasing a pedestal electrode supporting said substrate to attract argon ions to said substrate, thereby etching said barrier layer; a subsequent third step, performed by physical vapor deposition, of depositing a copper seed layer over said barrier layer; and filling by electrochemical plating copper into said hole over said copper seed layer. 5. The process of claim 4, wherein said generating step includes inductively coupling RF power into a plasma reactor containing said pedestal electrode.6. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the steps of:a first step, performed at least partially by atomic layer deposition, of depositing a barrier layer comprising tantalum on sides of said hole, wherein said first step includes an initial CVD step for depositing a first part of said barrier layer and a subsequent sputtering step for depositing a second part of said barrier layer; a second step, performed by physical vapor deposition, of depositing a copper seed layer over said barrier layer; and filling by electrochemical plating copper into said hole over said copper seed layer. 7. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the sequentially performed steps of:a first step, performed by chemical vapor deposition, of depositing a first barrier layer comprising tantalum on sides of said hole; a second step, performed by sputtering, of depositing a second barrier layer comprising tantalum on said sides of said hole; a third step, performed by physical vapor deposition, of depositing a copper seed layer over said first and second barrier layers; and a fourth step, performed by electrochemical plating, of filling copper into said hole over said copper seed layer. 8. The process of claim 7, wherein said chemical vapor deposition comprises atomic layer deposition.9. The process of claim 7, further comprising a fifth step performed after said first stop performed in a sputter reactor of etching said first barrier layer at the bottom of said hole.10. The process of claim 9, wherein fifth step includes generating an argon plasma an biasing a pedestal electrode supporting said substrate to attract argon ions to said substrate, thereby etching said barrier layer.11. The process of claim 10, wherein said generating step includes inductively coupling RF power into a plasma reactor containing said pedestal electrode.12. A process for forming a copper interconnect in a substrate including a connect hole vertically extending through an inter-level dielectric layer, comprising the steps of:depositing by a deposition process comprising chemical vapor deposition a nitrided barrier layer on sides of said hole; in a sputter reactor including a tantalum target, etching said nitrided barrier layer on a bottom of said hole; in said sputter reactor, depositing a material comprising tantalum on sidewalls of said hole to form second barrier layer; depositing by physical vapor deposition a copper seed layer over said second barrier layer; and filling by electrochemical plating copper into said hole over said copper seed layer. 13. The process of claim 12, said deposition process comprises atomic layer deposition.14. The process of claim 12, wherein said nitrided barrier layer comprises TiSiN.15. The process of claim 12, wherein said second barrier layer comprises TaN.16. A method of filling one or more of a via and a trench in a patterned substrate, comprising:a) depositing a generally conformal first barrier layer in one or more of the via and the trench on patterned substrate by chemical vapor deposition, wherein the first barrier layer comprises a silicided nitride of a refractory metal selected from the group consisting of Ti, Ta, and W; b) removing the first barrier layer from horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and d) then depositing one or more conductive materials. 17. The method of claim 16, wherein depositing the conductive material comprises depositing a seed layer and a metal layer in the via and/or the trench after the second barrier layer is deposited.18. The method of claim 17, wherein the first barrier layer comprises a material is selected from the group consisting of Ti, Ta, W, and nitrides thereof.19. The method of claim 17, wherein the seed layer comprises copper.20. The method of claim 19, wherein the metal layer comprises is copper.21. The method of claim 17, wherein the seed layer is deposited by physical vapor deposition.22. The method of claim 17, wherein the metal layer is deposited by electroplating.23. The method of claim 16, wherein the second barrier layer comprises at least one refractory metal selected from the group consisting of Ta and W.24. The method of claim 16, wherein the second barrier layer comprises a material selected from the group consisting of Ta, TaN, W, WN, Ti, and TiN, and wherein the second barrier layer has a thickness of from about 2 nm to about 5 nm at the bottom of the via.25. A method of filling one or more holes in a patterned substrate, comprising:a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and d) then depositing one or more conductive materials to fill the holes. 26. The method of claim 25, wherein depositing the conductive material comprises depositing a seed layer and a metal layer in the holes after the second barrier layer is deposited.27. The method of claim 26, wherein the first barrier layer comprises material selected from the group consisting of Ta, TaN, W, and WN.28. The method of claim 27, wherein the second barrier layer comprises a material selected from the group consisting of Ta, TaN, T, TiN, W, and WN.29. The method of claim 28, wherein the seed layer comprises copper.30. The method of claim 29, wherein the metal layer comprises copper.31. The method of claim 26, wherein the seed layer is deposited by physical vapor deposition.32. The method of claim 26, wherein the metal layer is deposited by electroplating.33. The method of claim 25, wherein the second barrier layer comprises a material selected from the group consisting of Ta, TaN, W, WN, Ti, and TiN.34. A method of filling one or more of a via and a trench in a patterned substrate, comprising:a) depositing a generally conformal first barrier layer on the patterned substrate by chemical vapor deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and d) then depositing depositing the conductive material comprises one or more conductive materials, wherein depositing a seed layer and a metal layer in the via and/or the trench after the second barrier layer is deposited. 35. A method of filling one or more of a via and a trench in a patterned substrate having a metal layer underlying the via, comprising:a) depositing a generally conformal first barrier layer on the patterned substrate by chemical vapor deposition, wherein the first barrier layer comprises a silicided nitride of a refractory metal selected from the group consisting of Ti, Ta, and W; b) removing the first barrier layer from horizontal surfaces of the patterned substrate; c) depositing by physical vapor deposition a second barrier layer sufficient to provide a barrier on the bottom of the trench; and d) then depositing one or more conductive materials. 36. A method of filling one or more of a via and a trench in a patterned substrate having a metal layer underlying the via, comprising:a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from horizontal surfaces of the patterned substrate; c) depositing by physical vapor deposition a second barrier layer sufficient to provide a barrier on a bottom of the trench; and d) then depositing one or more conductive materials.