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Method of self-synchronization of configurable elements of a programmable unit

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/177
출원번호 US-0373595 (2003-02-24)
우선권정보 DE-0004728 (1997-02-08)
발명자 / 주소
  • Vorbach, Martin
  • M?nch, Robert
출원인 / 주소
  • PACT XPP Technologies AG
대리인 / 주소
    Kenyon &
인용정보 피인용 횟수 : 0  인용 특허 : 247

초록

A method of synchronizing and reconfiguring configurable elements in a programmable unit is provided. A unit has a two- or multi-dimensional, programmable cell architecture (e.g., DFP, DPGA, etc.), and any configurable element can have access to a configuration register and a status register of the

대표청구항

1. A method of synchronizing and reconfiguring configurable elements in units having a multi-dimensional programmable cell architecture, comprising:generating by at least one of the configurable elements at least one synchronization signal within a data stream during processing by the configurable e

이 특허에 인용된 특허 (247)

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  221. Poret Mark (Phoenix AZ), Software programmable logic array utilizing “and”and “or”gates.
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  240. Taylor Brad (Oakland CA), Video processing module using a second programmable logic device which reconfigures a first programmable logic device fo.
  241. Casselman Steven, Virtual computer of plural FPG's successively reconfigured in response to a succession of inputs.
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  244. Abramovici Miron, Virtual logic system for reconfigurable hardware.
  245. Kolchinsky Alexander (48 Gray Rd. Andover MA 01810), Virtual processor module including a reconfigurable programmable matrix.
  246. Schmidt Ulrich (Freiburg DEX) Caesar Knut (Gundelfingen DEX), Wavefront array processor for blocking the issuance of first handshake signal (req) by the presence of second handshake.
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