초록 ▼

A device structure and method for forming graded junction using a implant process. Embodiments of the invention comprise implanting ions into said silicon substrate to form doped regions adjacent to said gate. The orientation of the channel region in the Si crystal structure (channel direction <1

A device structure and method for forming graded junction using a implant process. Embodiments of the invention comprise implanting ions into said silicon substrate to form doped regions adjacent to said gate. The orientation of the channel region in the Si crystal structure (channel direction <100>) in combination with the large angle tilt and twist implant process produce doped regions that have a more graded junction. The orientation and implant process creates more channeling of ions. The channeling of ions creates a more graded junction. When implemented on a HV MOS TX, the graded junction of the LDD increases the breakdown voltage. Another embodiment is a FET with an annular shaped channel region.

대표청구항 ▼

1. A method of fabrication of doped regions in a semiconductor device; comprising the steps of:a) providing a {001} silicon substrate;b) forming a gate over said silicon substrate; said gate having a width and a length; a channel under the gate; said channel having a channel direction parallel with

1. A method of fabrication of doped regions in a semiconductor device; comprising the steps of:a) providing a {001} silicon substrate;b) forming a gate over said silicon substrate; said gate having a width and a length; a channel under the gate; said channel having a channel direction parallel with the direction of said gate width; said channel direction is [100] or [010] direction;c) implanting ions into said silicon substrate to form a doped region adjacent to said gate; the implantation of ions comprises a large angle tilt implant with a twist of between about 40 and 50 degrees and a tilt angle of 40 and 50 degrees.2. The method of claim 1 wherein said doped region is a N-LDD in an offset LDMOS FET.3. The method of claim 1 wherein said ions being implanted about along the [110] directions of the silicon substrate.4. The method of claim 1 wherein the implanting of said ions is performed in one implant step at an about 45 degree twist implant and a tilt angle of about 45 degrees.5. The method of claim 1 wherein said silicon substrate has a notch/flat at a [110] direction.6. The method of claim 1 wherein the implanting of ions further comprises: said silicon substrate has a notch/flat at a <110> direction,the implantation comprises an implant with a 45 tilt and 45 twist and the ions enter the substrate aligned at a <0?1?1> direction whereby the direction increases the channeling.7. The method of claim 1 wherein said channel has an annular shape with a doped region on the inside of said channel and a second doped region surrounding the outside of said channel.8. The method of claim 1 wherein said channel has an annular shape with a doped region on the inside of said channel region and a second doped region surrounding the outside of said channel;and the implanting of said ions further comprises a quadra implant at the twist angles of about 45, 135, 225 and 315 degrees with a range of +/?5 degrees; and a tilt angle between 40 and 50 degrees.9. The method of claim 1 wherein said channel has an annular shape with a doped region on the inside of said channel and a second doped region surrounding the outside of said channel region;and the implanting of said ions further comprises a quadra implant with the ion beams aligned with the <110> direction within plus/minus 2 degrees.10. The method of claim 1 which further includes forming a High Vt NMOS FET from said gate and doped regions.11. The method of claim 1 wherein a LDMOS device is formed.12. The method of claim 1 which further comprises forming a second gate over said silicon substrate; said second gate having a width and a length; a second channel under the second gate; said second channel having a second channel direction parallel with the direction of width of said second gate; said second channel direction is parallel or perpendicular with the <110> direction.13. The method of claim 1 wherein the implanting of ions further comprises:the implantation comprises an implant with a 45 tilt and 45 twist and the ions enter the substrate aligned at a <0?1?1> direction whereby the direction increases the channeling.