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A housing for opto-electronic array devices. The housing includes a base and walls that form a region that receives an opto-electronic semiconductor array. Conductive traces are disposed on a wall such that a front part of the traces are exposed for external electrical connections, while the back pa

A housing for opto-electronic array devices. The housing includes a base and walls that form a region that receives an opto-electronic semiconductor array. Conductive traces are disposed on a wall such that a front part of the traces are exposed for external electrical connections, while the back part is exposed for internal electrical connections. A transparent substrate having a plurality of micro-lenses cover the base, walls and opto-electronic semiconductor array device. Each micro lens is beneficially made from optical epoxy that is deposited by an ink-jet nozzle. The base and walls are beneficially comprised of a ceramic.

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What is claimed is: 1. A semiconductor package, comprising: a submount having a base, a cavity defined by side walls on the base, a bonding portion, and a plurality of conductive traces on the bonding portion, wherein a first conductive material is embedded in a surface of the base, the first condu

What is claimed is: 1. A semiconductor package, comprising: a submount having a base, a cavity defined by side walls on the base, a bonding portion, and a plurality of conductive traces on the bonding portion, wherein a first conductive material is embedded in a surface of the base, the first conductive material receiving an optical device and wherein the first conductive material functions as a heat sink; a transparent substrate on the side walls and covering the cavity; and a micro lens coupled to the transparent substrate; wherein said submount and said transparent substrate define an enclosed interior region; and wherein said conductive traces extend from the enclosed interior region to an exterior region for electrical connection. 2. A semiconductor package according to claim 1, wherein the transparent substrate includes glass. 3. A semiconductor package according to claim 1, wherein the side walls are made of nonconductive material and the side walls extend upward from the base. 4. A semiconductor package according to claim 1, further comprising a first common electrode beneath the base of the submount. 5. A semiconductor package according to claim 4, wherein the cavity is defined by the base and the side walls, a portion of the surface of the base being made of a conductive material, wherein the first common electrode is in electrical contact with the conductive material through a second common electrode, the second common electrode being imbedded in the base. 6. A semiconductor package according to claim 1, wherein the bonding portion includes a bonding base and the conductive traces are on a surface of the bonding base. 7. A semiconductor package according to claim 1, wherein the cavity is further defined by the bonding base. 8. A semiconductor package according to claim 1, wherein the cavity includes an optical device, the optical device being positioned on the base inside the cavity and the optical device being electrically connected to the conductive traces. 9. A semiconductor package according to claim 1, wherein the transparent substrate and the submount are hermetically sealed. 10. A semiconductor package according to claim 1, wherein the micro lens is an array of micro lens attached to the transparent substrate at a position aligned with an optical device to be placed in the cavity. 11. A semiconductor package according to claim 1, wherein the micro lens is attached to the transparent substrate on a top surface, a bottom surface or both. 12. A semiconductor package according to claim 1, wherein the cavity receives an optical device including a vertical cavity semiconductor emitting laser (VCSEL), a photodetector or both. 13. A semiconductor package according to claim 1, wherein the base of the submount includes ceramic. 14. A semiconductor package according to claim 13, wherein said ceramic material is one of alumina and beryllia. 15. A semiconductor package according to claim 1, wherein the base, the side walls and the bonding portion are integrally attached to form the cavity that is hermetically sealed. 16. A semiconductor package according to claim 1, wherein the cavity is defined by the base and the side walls made of nonconductive material, the base having a portion of the surface made with a conductive material; the side walls extend upward from the base of the submount; the transparent substrate and the submount are hermetically sealed; the micro lens is attached to the transparent substrate on a top surface, a bottom surface or both; and the cavity is to receive an optical device including a vertical cavity semiconductor emitting laser (VCSEL), a photodetector or both. 17. A semiconductor package according to claim 16, further comprising a first common electrode beneath the base of the submount, the first common electrode being in electrical contact with the conductive material. 18. A semiconductor package, comprising: a submount having a base, a cavity defined by side walls on the base, a bonding portion, and a plurality of conductive traces on the bonding portion, wherein a conductive material is embedded in a surface of the base, the conductive material receiving an optical device and wherein the first conductive material functions as a heat sink; means for covering the cavity with a transparent substrate; and means for coupling a micro lens to the transparent substrate; wherein said submount and said transparent substrate define an enclosed interior region; and means for extending the conductive traces extend from the enclosed interior region to an exterior region for electrical connection. 19. A semiconductor package according to claim 18, wherein the side walls extend upward from the base of the submount; the transparent substrate and the submount are hermetically sealed; the micro lens is attached to the transparent substrate on a top surface, a bottom surface or both; and the cavity is to receive an optical device including a vertical cavity semiconductor emitting laser (VCSEL), a photodetector or both. 20. A semiconductor package according to claim 19, further comprising a first common electrode beneath the base of the submount, the first common electrode being in electrical contact with the conductive material. 21. A semiconductor package, comprising: a submount having a ceramic base and ceramic side walls, the ceramic base including first and second surfaces; a transparent substrate on the side walls of the submount defining an enclosed interior region; a micro lens coupled to the transparent substrate; and a vertical cavity semiconductor emitting laser (VCSEL) over the first surface of the base, wherein the first and second surfaces of the base include first and second conductive materials, respectively, and the first and second conductive materials are electrically connected to each other. 22. A semiconductor package according to claim 21, further comprising an array device on the first surface of the base, the array device including the VCSEL. 23. A semiconductor package according to claim 21, wherein the first conductive material is embedded in a portion of the first surface of the base.