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Method for determining idle processor load balancing in a multiple processors system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/46
출원번호 US-0449068 (2003-05-30)
발명자 / 주소
  • Brenner,Larry Bert
  • Browning,Luke Matthew
출원인 / 주소
  • International Business Machines Corporation
인용정보 피인용 횟수 : 47  인용 특허 : 53

초록

An apparatus and methods for periodic load balancing in a multiple run queue system are provided. The apparatus includes a controller, memory, initial load balancing device, idle load balancing device, periodic load balancing device, and starvation load balancing device. The apparatus performs initi

대표청구항

What is claimed is: 1. A computer implemented method of balancing workload among a plurality of processors, comprising: identifying an idle processor from the plurality of processors; scanning the plurality of processors for a processor meeting idle processor load balancing criteria, wherein scanni

이 특허에 인용된 특허 (53)

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  2. Hussain, Muhammad Raghib; Kessler, Richard; Dickinson, Philip H., Apparatus and method for allocating resources within a security processing architecture using multiple groups.
  3. Hussain, Muhammad Raghib; Dickinson, Philip H.; Badr, Imran, Apparatus and method for allocating resources within a security processing architecture using multiple queuing mechanisms.
  4. Kissell, Kevin D., Apparatus, method and instruction for initiation of concurrent instruction streams in a multithreading microprocessor.
  5. Kissell, Kevin D, Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessor.
  6. Kissell,Kevin D; Jones,Darren M., Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessor.
  7. He, Yuxiong; Elnikety, Sameh; McKinley, Kathryn S.; Ren, Shaolei, Assigning jobs to heterogeneous processing modules.
  8. Gounares, Alexander G.; Garrett, Charles D., Control flow graph operating system configuration.
  9. Lee, Won Jong; Park, Chan Min; Lee, Shi Hwa, Data processing apparatus and method of controlling the data processing apparatus.
  10. Arai, Masahiro; Matsunami, Naoto, Disk array apparatus and method of controlling the same by a disk array controller having a plurality of processor cores.
  11. Rumelhart, Karl E.; Tuttle, Timothy; Lueck, Jeremy S.; Benevidez, J. Joseph; Cano, Charles E.; Huang, Alex, Dynamically allocating threads from a thread pool to thread boundaries configured to perform a service for an event.
  12. Garrett, Charles D.; Li, Ying; Gounares, Alexander G., Experiment manager for manycore systems.
  13. Fontenot, Nathan D.; Moilanen, Jacob Lorien; Schopp, Joel Howard; Strosaker, Michael Thomas, Horizontal scaling of stream processing.
  14. Kissell,Kevin D, Integrated mechanism for suspension and deallocation of computational threads of execution in a processor.
  15. Gounares, Alexander G.; Garrett, Charles D., Many-core process scheduling to maximize cache usage.
  16. Kissell,Kevin D., Mechanisms for assuring quality of service for programs executing on a multithreaded processor.
  17. Kissell, Kevin D, Mechanisms for dynamic configuration of virtual processor resources.
  18. Gounares, Alexander G.; Li, Ying; Garrett, Charles D.; Noakes, Michael D., Memory usage configuration based on observations.
  19. Gounares, Alexander G., Meta garbage collection for functional code.
  20. Taylor, Neil Allen; Holley, Adam R.; Aggarwal, Vijay K.; Kumhyr, David Bruce, Method and system for load balancing of computing resources.
  21. Franke, Carsten, Multi-objective allocation of computational jobs in client-server or hosting environments.
  22. Gounares, Alexander G.; Garrett, Charles D., Network aware process scheduling.
  23. Gounares, Alexander G.; Li, Ying; Garrett, Charles D.; Noakes, Michael D., Optimized memory configuration deployed on executing code.
  24. Gounares, Alexander G.; Li, Ying; Garrett, Charles D.; Noakes, Michael D., Optimized memory configuration deployed prior to execution.
  25. Ross, Richard A., Parsing XML in software on CPU with multiple execution units.
  26. Garrett, Charles D., Pattern extraction from executable code in message passing environments.
  27. Garrett, Charles D., Pattern matching process scheduler in message passing environment.
  28. Garrett, Charles D., Pattern matching process scheduler with upstream optimization.
  29. Kissell, Kevin D., Preemptive multitasking employing software emulation of directed exceptions in a multithreading processor.
  30. Gounares, Alexander G.; Garrett, Charles D., Recompiling with generic to specific replacement.
  31. Li, Ying; Gounares, Alexander G.; Garrett, Charles D.; Krajec, Russell S., Relationships derived from trace data.
  32. Vishin, Sanjay; Kissell, Kevin D.; Jones, Darren M.; Kinter, Ryan C., Smart memory based synchronization controller for a multi-threaded multiprocessor SoC.
  33. Vaddagiri, Srivatsa, Soft partitions and load balancing.
  34. Kissell, Kevin D., Software emulation of directed exceptions in a multithreading processor.
  35. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  36. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  37. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  38. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  39. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  40. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  41. Kissell, Kevin D., Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  42. Kissell,Kevin D, Symmetric multiprocessor operating system for execution on non-independent lightweight thread contexts.
  43. Kissell, Kevin D., Synchronized storage providing multiple synchronization semantics.
  44. Kissell, Kevin D., System, method, and computer program product for conditionally suspending issuing instructions of a thread.
  45. Rumelhart, Karl E.; Tuttle, Timothy; Lueck, Jeremy S.; Benevidez, J. Joseph; Cano, Charles E.; Huang, Alex, Thread boundaries comprising functionalities for an event by a single thread and tasks associated with the thread boundaries configured in a defined relationship.
  46. Garrett, Charles D., Transmission point pattern extraction from executable code in message passing environments.
  47. Gounares, Alexander G., Usage aware NUMA process scheduling.
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