IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0798450
(2001-03-02)
|
발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
Hickman Palermo Truong &
|
인용정보 |
피인용 횟수 :
5 인용 특허 :
42 |
초록
▼
The invention provides a method and system for routing information lookup for packets using a routing protocol such as IP. Routing information which has been determined responsive to the packet header, which includes a destination address, a source address, and an input interface for the packet. Ro
The invention provides a method and system for routing information lookup for packets using a routing protocol such as IP. Routing information which has been determined responsive to the packet header, which includes a destination address, a source address, and an input interface for the packet. Routing lookup is performed in response to at least one set of selected routing information, using a lookup table which includes tags both for the routing information and for a bitmask length (thus indicating the generality or scope of the routing information for the routing lookup). The lookup table is structured so that addresses having the most common bitmask length are addressed first, but that more specific addresses are still considered when they are present. It has been discovered that most internet addresses can be found by reference to 24-bit or 21-bit IP addresses, after which 16-bit, 12-bit, and finally 32-bit IP addresses are considered. Lookup flags indicate when a relatively uncommon but more specific 32-bit IP address match is available. A memory controller pipelines the lookup requests to a hash table memory, flushes superfluous requests when a lookup result is found, and handles cases relating to 32-bit IP address matches.
대표청구항
▼
What is claimed is: 1. A method, including the steps of receiving a packet header, said packet header including header information; determining a packet treatment identifier responsive to said header information; and using said packet treatment identifier to access a memory having information entri
What is claimed is: 1. A method, including the steps of receiving a packet header, said packet header including header information; determining a packet treatment identifier responsive to said header information; and using said packet treatment identifier to access a memory having information entries regarding treatment of packets, said information entries being responsive to a length field for said header information, said information entries accessed from said memory in order of most probable usage. 2. A method as in claim 1, wherein said packet treatment identifier includes a destination IP address. 3. A method as in claim 1, wherein said packet treatment identifier includes a source IP address. 4. A method as in claim 1, wherein said length field indicates a longest match for a destination address included in said header information. 5. A method as in claim 4, wherein said memory includes a plurality of information entries matching said destination address and responsive to a multicast packet. 6. A method, including the steps of receiving a packet header, said packet header including header information; determining a packet treatment identifier responsive to said header information, said packet treatment identifier including a destination address; and using said packet treatment identifier to access a memory having information regarding routing of packets, said information being responsive to a length field for said header information, said information including a plurality of entries matching said header information and differing with regard to said length field, said entries associated with packet routing information. 7. A router, including ports for sending and receiving packets; a processor for controlling routing of said packets; a memory storing instructions for said processor, said instructions including the steps of: (1) receiving a packet header, said packet header including header information, (2) determining a packet treatment identifier responsive to said header information, said packet treatment identifier including a destination address, (3) using said packet treatment identifier to access said memory, and (4) routing said packets based on results of accessing said memory; wherein said memory also has information regarding routing of packets, said information being responsive to a length field for said header information, said memory including a plurality of entries matching said header information and differing with regard to said length field, said entries associated with packet routing information, and wherein said length field indicates a longest match for said destination address included in said header information. 8. A router as in claim 7, wherein said destination address is a destination IP address. 9. A router as in claim 7, wherein said packet treatment identifier includes a source IP address. 10. A router as in claim 7, wherein said memory includes a plurality of entries matching said destination address and responsive to a multicast packet. 11. A router, including ports for sending and receiving packets; a processor for controlling routing of said packets; a memory storing instructions for said processor, said instructions including the steps of: (1) receiving a packet header, said packet header including header information, (2) determining a packet treatment identifier responsive to said header information, (3) using said packet treatment identifier to access said memory, and (4) routing said packets based on results of accessing said memory; wherein said memory also has information entries regarding treatment of packets, said information entries being responsive to a length field for said header information, said information entries accessed from said memory in order of most probable usage. 12. A router as in claim 11, wherein said packet treatment identifier includes a destination IP address. 13. A router as in claim 11, wherein said packet treatment identifier includes a source IP address. 14. A router as in claim 11, wherein said length field indicates a longest match for a destination address included in said header information. 15. A router as in claim 14, wherein said memory includes a plurality of information entries matching said destination address and responsive to a multicast packet. 16. A router, including ports for sending and receiving packets; a processor for controlling routing of said packets; a memory storing instructions for said processor, said instructions including the steps of: (1) receiving a packet header, said packet header including header information, (2) determining a packet treatment identifier responsive to said header information, said packet treatment identifier including a destination address, (3) using said packet treatment identifier to access said memory, and (4) routing said packets based on results of accessing said memory; wherein said memory also has information regarding routing of packets, said information being responsive to a length field for said header information, said information including a plurality of entries matching said header information and differing with regard to said length field, said entries associated with packet routing information. 17. A method, comprising the steps of: receiving a packet header, said packet header including header information; selecting a length of said header information; determining a packet treatment identifier responsive to said header information; and accessing, using said packet treatment identifier, a memory having information entries regarding treatment of packets, said information entries being responsive to a length field for said header information, wherein said memory is accessed in order of most probable usage based on said selected length of the header information.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.